ARM: brcmstb: revert SMP support

There were several issues (of varying degree of importance) pointed out
with this code late in the review cycle, yet the code was still merged.
Let's rip it out for now and look at resubmitting at a later time.

This reverts most of commit 4fbe66d9903425156c193ae44c81c0f7557755c4.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Revert "ARM: brcmstb: revert SMP support"

This reverts commit 5764e7d7f2f1d20b9f68f33a2918796c8cff7c8d.
ARM: brcmstb: Kconfig: drop unneeded symbol selections

These are either implied or not necessary.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <robherring2@gmail.com>
ARM: brcmstb: Makefile: fix build for ARMv6

The SMP code uses some macros which are ARMv7 specific. Let's only
compile with v7 support.

This can be seen with 'make allmodconfig', for example:

    CC      arch/arm/mach-bcm/platsmp-brcmstb.o
  /tmp/ccXU2xo6.s: Assembler messages:
  /tmp/ccXU2xo6.s:179: Error: selected processor does not support ARM mode `isb '
  /tmp/ccXU2xo6.s:185: Error: selected processor does not support ARM mode `isb '
  /tmp/ccXU2xo6.s:186: Error: selected processor does not support ARM mode `dsb '

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <robherring2@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
ARM: brcmstb: drop SMP prints

These are mostly duplicated in the kernel core.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <robherring2@gmail.com>
ARM: brcmstb: fix oops when given an incomplete CPU DT

If the brcm,brcmstb-smpboot DT node is not well-formed, we might not
have grabbed these register resources. Let's program defensively and
simply fail to boot these CPUs in that case, instead of OOPSing like
this:

   ...
   [    0.065775] can't find compatible node brcm,brcmstb-smpboot
   [    0.071689] Setting up static identity map for 0x8881b8 - 0x888250
   [    0.079443] Unable to handle kernel NULL pointer dereference at virtual address 0000000c
   [    0.088004] pgd = c0204000
   [    0.090884] [0000000c] *pgd=00000000
   [    0.094757] Internal error: Oops: 5 [#1] SMP ARM
   [    0.099707] Modules linked in:
   [    0.102993] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.16.0-rc6-00013-g6285b201a662 #96
   [    0.111506] task: e9068000 ti: e9056000 task.ti: e9056000
   [    0.117294] PC is at brcmstb_boot_secondary+0x28/0x130
   [    0.122766] LR is at __cpu_up+0xb8/0x16c
   [    0.126943] pc : [<c02232f0>]    lr : [<c02141c0>]    psr: a0000153
   [    0.126943] sp : e9057ee8  ip : 00000000  fp : c0bd2b14
   [    0.139107] r10: e906ad00  r9 : 00000000  r8 : 00000000
   [    0.144630] r7 : e906ad00  r6 : 00000001  r5 : c1344610  r4 : c141d570
   [    0.151526] r3 : 0000000c  r2 : 00000003  r1 : 00000000  r0 : 00000001
   [    0.158441] Flags: NzCv  IRQs on  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
   [    0.166259] Control: 10c5387d  Table: 0020406a  DAC: 00000015
   [    0.172321] Process swapper/0 (pid: 1, stack limit = 0xe9056250)
   [    0.178687] Stack: (0xe9057ee8 to 0xe9058000)
   [    0.183326] 7ee0:                   c02232c8 c141d2ec 00000001 c141d310 e906ad00 c02141c0
   [    0.191996] 7f00: 00000001 00000001 c1340458 00000000 00000001 c024c36c e9057f24 00000003
   [    0.200614] 7f20: c1335430 00000014 00000001 c1340458 c1340530 c1384a88 c0890110 c134045c
   [    0.209267] 7f40: 00000000 c024c414 00000001 c0b8a9e4 c1340548 c0c05d78 c0c05d78 00000000
   [    0.217877] 7f60: 00000000 00000000 00000000 c0b60c34 aa7db883 ec9b3ea5 9ce01af4 1ccd695e
   [    0.226486] 7f80: 91fd02fd 00000000 c087e908 00000000 00000000 00000000 00000000 00000000
   [    0.235078] 7fa0: 00000000 c087e910 00000000 c020e738 00000000 00000000 00000000 00000000
   [    0.243730] 7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
   [    0.252400] 7fe0: 00000000 00000000 00000000 00000000 00000013 00000000 352c70ba da256bc0
   ...

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
ARM: brcmstb: drop redundant IRQ disable

Interrupts are already disabled in cpu_die() (arch/arm/kernel/smp.c).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <robherring2@gmail.com>
ARM: brcmstb: fixup hotplug/SMP synchronization

The 'boot_lock' spinlock was an unneeded relic borrowed from other
platforms.

The 'per_cpu_sw_state' control loops, however, require a particular
cache/barrier sequence. Let's briefly note why.

Also, the dmb() was technically in the wrong place; we want to ensure
all previous operations have completed *before* we write to the per-cpu
SW flag.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <robherring2@gmail.com>
fixup! ARM: brcmstb: drop redundant IRQ disable
ARM: brcmstb: don't panic() on failed cpu_die()

panic() will access shared kernel structures, but the dying CPU is
already in non-coherent mode. So don't do this.

Just loop forever, since we'll likely notice there's a problem as soon
as we try to power this CPU down anyway.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
ARM: drop ISAR0 workaround for B15

The Brahma-B15's ISAR0 correcty advertises UDIV/SDIV support in both ARM
and Thumb2 modes (CPUID_EXT_ISAR0=02101110), so we don't need to
manually apply this hwcap.

The code in question actually predates the following commit, which made
our hwcaps unnecessary:

    commit 8164f7af88d9ad3a757bd14f634b23997ee77f6b
    Author: Stephen Boyd <sboyd@codeaurora.org>
    Date:   Mon Mar 18 19:44:15 2013 +0100

        ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>