armv7m: switch to PSP at reset

Switch to using the PSP immediately on reset.  This allows extra logic
in the SVC handler detecting SVCs coming from the MSP to be removed.

This avoids a bug where save_context would save the caller's context on
the PSP, which was still 0x0, potentially causing a bus fault.

The switch to interrupt context will switch the core to the MSP.  To
keep the interrupt context from cobblering the thread mode stack, leave
a 512 byte buffer between the initial MSP and PSP.

Change-Id: I3ce79b0a295060e5d1d7b3f347521f14518ad56b
stm32f4: add SPI{4-6} peripherals

Add STM32F4 peripheral IDs for SPI4, SPI5, and SPI6.  These SPI
peripherals exist on some STM32F401 and STM32F42x chips.

Change-Id: I9be93f985d365cac1a6d154f587e3f28ba82d144
build: build with arch-level linker script

Generalize the linker scripts and provide a single linker script for
each architecture.  The section VMA and LMA regions are specified by a
new set of Kconfig options.

The linker memory regions section is automatically generated from a new
/memory node in the device tree.  This node describes the ROM, RAM,
flash, etc regions of memory and is parsed at build time to build LD's
MEMORY section for the linker script.

Along the way, some unused symbols are removed and the linker scripts
are generally cleaned up.

Change-Id: I3f65cdf764286c9287a451a3bec144ab07fa43b8
stm32f4: STM32F401 and 32F401CDISCOVERY support

Add support for the STM32F401 series of low power STM32F4 chips.
Specifially, the 32F401CDISCOVERY dev board is targeted.

Most of the work here is splitting up the device tree files for the
small differences between the STM32F405/7 and STM32F401.

Additionally, in the STM32F4 clocks init, compute the PLL values from
CONFIG_SYS_CLOCK, rather than hard-coding PLLs for 168MHz.

Change-Id: I122b7db68b9623dbf24fd8b4aba3ba3d0adedefd