jetway/nf81-t56n-lf: Use std memset/memcpy func over AGESA

Replace usage of AGESA poor reinvention of memset/memcpy functions with
the usual standard ones.

Change-Id: Ibfe9ee253d57140b06a4fca6b47b2051308ad012
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5484
Tested-by: build bot (Jenkins)
jetway/nf81-t56n-lf: Replace AGESA types with stdint types

Try to use void and uint*_t type specifiers in place of VOID and UINT*
respectively. Use const in place of CONST type modifier. Remove some
useless type casts.
A few unneeded comments containing the AGESA redefenied types are also
removed.

Change-Id: I4bff96a222507fc35333488331c3f35ef1158132
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5486
Tested-by: build bot (Jenkins)
cpu/amd/agesa/s3_resume.c: Specify include paths from AGESA_ROOT

Following the same reasoning as in commit
* 1d87dac hp/pavilion_m6_1035dx: Sanitize #includes
include AGESA files with a path relative to AGESA_ROOT. We cannot
with more than one generation of AGESA, hence the path being relative
to AGESA_ROOT.

Change-Id: If15c4cbfd42e0264264fdb3e8c426a47609ad41f
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5426
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
mainboard/*/acpi/ide.asl: Serialize ACPI methods to avoid races.

Serialize methods against the construction of same (named) objects by
competing threads. See ACPICA BZ 909 for further details.

This change fixes issues that show up with the Ubuntu firmware test
suite (fwts) ACPI table sanity checker.

Change-Id: I49e3050a2a5aece6f031122b0211c056938d1a89
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5458
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
cimx/sb800 boards: Don't require ide.asl on boards without IDE

Not all boards which use the AMD cimx/sb800 southbridge have IDE.
However, the southbridge's asl included an 'ide.asl' file which had to
be present in $(mainboard_dir)/acpi.

Address this issue by including ide.asl only in boards which have IDE,
and remove it from all other cimx/sb800 boards.

Change-Id: I57fcb4db9f85234b05ae1705ef81a576c478cee6
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5460
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
hp/pavilion_m6_1035dx: Add basic EC initialization

The EC is now set to ACPI mode, and properly generates SCIs on
external events. This fixes the issue where battery notifications were
not working.
The keyboard matrix type is also explicitly set up.

Change-Id: Ib6f0d23984d4ed1320340282469b8325c83547d1
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5471
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
cimx/sb800/cfg.c: Cut out purposeless ROM reading noise.

Follow along hudson, cut out "SLP_TYP type was 0" excessively filling
the buffer. We could make this conditional on non-zero?

Change-Id: Iffd4c146b2ac4f57dbc3a011a683c92b6e132e39
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5495
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
cpu/amd/agesa/family15tn: Add initial support for SMM mode

This is the minimal setup needed to be able to execute SMI handlers.
Only support for ASEG handlers is added, which should be sufficient
for Trinity (up to 4 cores).

There are a few hacks which need to be introduced in generic code in
order to make this work properly, but these hacks are self-contained.
They are a not a result of any special needs of this CPU, but rather
from a poorly designed infrastructure. Comments are added to explain
how such code could be refactored in the future.

Change-Id: Iefd4ae17cf0206cae8848cadba3a12cbe3b2f8b6
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
southbridge/amd/agesa/hudson: Add initial support for SMM

This sets up the infrastructure to handle SMIs generated by the Hudson
sothbridge. An API for interfacing to mainboard handlers is not
defined at this point. A few functions are defined to allow mainboard
code to enable SMIs from GEVENT pins. These are the only functions which
I expect to be needed anytime in the foreseeable future.

SMIs are always acknowledged and cleared, as not clearing an SMI will
cause us to re-enter the SMI, effectively bricking the machine if a
southbridge-generated SMI without a handler occurs.

Change-Id: Ibceb21ac5423eb134d3eb7d24800280b183f7619
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Fix GPIO map and add WLAN pin

Change-Id: I07725b71508c8b08451022307ae934c1b227f7f9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Put EC in APM mode before ACPI mode

The EC may disable some functionality, such as Caps Lock LED and
battery charging if it never receives a command to go in APM mode. The
workaround is to put it in APM mode before switching it to ACPI mode.

Change-Id: Iffaeb9a6f57841f456c4bce8337dc09b287f8758
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[RFC] ec/compal/ene932: Update to use coreboot EC API

This is based on the EC-mainboard interaction draft specification [1]

Enjoy the clusterURL in clustercommit clustermessage.

[1] http://www.coreboot.org/ACPI/Board-EC_interaction#The_mainboard_namespace_method

Change-Id: If0b09be4f5e17cc444539a30f0186590fa0b72b5
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Implement ACPI for wireless toggle hotkey

Change-Id: I2e9ab68263648af8c9d46999e960f0a0711b61d7
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Implement MB.LIDS ACPI method

Change-Id: I654ca745f7404b86aa25fb2e696751d616d0ca03
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
usbdebug: Reduce bus reset delays

According to EHCI specification, host controller software stops
the USB Reset condition by writing PORT_RESET=0. Software then
poll-waits this bit until controller hardware has completed USB
Reset sequence and read returns with PORT_RESET==0.

Change-Id: I6033c4d904c2af9eb16f5f3c1eb825776648cc1d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
usbdebug: Add optional quirk for old DIY debug part

Not sure what this is about. Required for FX2.

Change-Id: I86878f8f570911ed1ed3ec844c232ac91e934072
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
vendorcode/amd/agesa/fam15tn: Build as a static library

Up until now, we were building AGESA by specifying each AGESA source
file and adding it to the list of romstage and ramstage source files.
As a result, we were compiling each AGESA source twice, despite the
fact that it does not depend on the stage we're in.

Since AGESA is stage-independent, we can build it just once, and use
the resulting static library in both rom and ram stages.

We still keep the practice of specifying every single AGESA directory
as an include dir and adding the AGESA CFLAGS to our global CFLAGS;
this is needed due to the way AGESA builds.

Change-Id: I9b23264129d1c08cb67cabc31d15a68d43ed7624
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
southbridge/amd/agesa/hudson: Clean up AGESA #includes

NOTFORMERGE: EDIT commit message to include proper hash

Just like in commit
<HASH HERE> vendorcode/amd/agesa/fam15tn: Clean #includes in public headers

Include AGESA headers specifying the path relative to AGESA_ROOT. The
path is specified relative to AGESA_ROOT as opposed to src/ since this
code may include headers from different AGESA families, depending on
the board.

Change-Id: Ide38cc34e207a8b617d1d319fd9c17a785f55833
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
vendorcode/amd/agesa/fam15tn: Clean #includes in public headers

Right now, coreboot code using AGESA headers can only build if all the
AGESA path are given to the compiler via the "-I" option. This is sub-
optimal, as it requires us to have every AGESA source directory
specified as a compiler include path. This pollutes our global include
paths.

We restrict the compiler include paths to only allow "AGESA_ROOT/" and
"AGESA_ROOT/Include". We then modify the AGESA headers to specify
non-local include files relative to "AGESA_ROOT/Include".

We use the convention that includes relative to the directory of the
header are included as "path/to/header.h", while includes relative to
AGESA_ROOT are included as <path/to/header.h>.

This change allows building coreboot code based on AGESA with the
limited subset of include paths, but does not allow AGESA itself to
build with this restricted subset.

Change-Id: I31102273c8caa8d6b1d80774bfd35711825bec03
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hudson boards: Don't require ide.asl file on boards without IDE

Not all boards which use the Hudson southbridge have IDE. However,
the southbridge's asl included an 'ide.asl' file which had to be
present in $(mainboard_dir)/acpi.

Address this issue by including ide.asl only in boards which have IDE,
and remove it from all other hudson boards.

Change-Id: Ie2efb7ebf8f5b527e26d7aaaeafbd3053a9a6b28
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>