Shift registers almost work, but if I push 0x1 to pin N, pins N+1 are
all high.
Merge pull request #1 from funrollloops/master

Work from Aug 10
Remapped outputs after re-wiring to transistors.
Merge pull request #2 from funrollloops/master

monitor_load_cell.py: switch to channel 0/1 from 2/3
Merge pull request #3 from funrollloops/master

Server, add module for continuous load cell monitoring
Got the shift regs working.
Merge branch 'master' of https://github.com/nebree8/nebree8