CHROMIUM: ARM: dt: blaze: change AS3722 adc channel

Blaze uses ADC channel 21 to sense AS3728 SD6 regulator
temperature. Change the dt setting accordingly.

BUG=chrome-os-partner:28994
TEST=cat /sys/class/thermal/thermal_zone5/temp returned a fixed
and invalid value, but the value looks good and changes with this
change.

Change-Id: I3228c8d7e76b8012be097c407e75fc4cace1e182
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/199999
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit e1c7d01ecb32c5f37b822e8ae8b8782dfd76ea47)
Reviewed-on: https://chromium-review.googlesource.com/201162
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: ARM: dts: blaze: clock GEN2 I2C at 400KHz

Blaze shall be able to clock trackpad/touchpad I2C bus at 400KHz.
Change the dt setting accordingly to improve the performance.

BUG=chrome-os-partner:29023
TEST=emerged blaze kernel, captured the waveform from gen2 i2c bus,
scl running at ~400Kz and the waveform looks good.

Change-Id: I381627cca42e66406a90518a4fdac3e440f0c928
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200720
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 62fd106fe44e05d75867ce92a2d4706f87ebfb3c)
Reviewed-on: https://chromium-review.googlesource.com/200815
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: dt: Increase big panel power-off time

The Full HD panel of BIG requires 500ms power-off time.
Since we can't define different skus in DT, we have to
increase the power-off time in BIG DT to make all panels
happy.

BUG=chrome-os-partner:28128
TEST=Display works and system boots up normally

Change-Id: I19794ff7b462d8dbae81c9e224e8caaca0ed2a8d
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200545
Tested-by: Bill Huang <bilhuang@nvidia.com>
Tested-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 094823d59895f07ebbf07de69e4c5c918061a28d)
Reviewed-on: https://chromium-review.googlesource.com/201168
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: video: tegra: Active dc/sor register change immediately

When doing DP attach, we need to make sure the register change to take
effect immediately, otherwise it may fail to catch the attach timing.

BUG=chrome-os-partner:28128
TEST=Display works and system boots up

Change-Id: Ie9ee0e40aaa9aada0ce769f132c0e2aa23fcd4fa
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200418
Tested-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 9638cbf66d5958b61ff706cef4eee6d25268b219)
Reviewed-on: https://chromium-review.googlesource.com/201310
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: powergate: Powergate refcount based partitions when boot

venc/disp1/disp2/sor are 4 powergate partitions which are refcount
based. CoreBoot may enable something(e.g: display) so when kernel
takes over the system, we need to make sure the hardware environment
is clean.

So this change makes powergate driver powergate all these 4 partitions
when booting, so that the refcounts for these 4 partitions can be zero.

BUG=chrome-os-partner:28128
TEST=Display works and system boots up

Signed-off-by: Mark Zhang <markz@nvidia.com>

Change-Id: I93d44e5424f1e6bf11685cbc2cf0b1d33a63c4a0
Reviewed-on: https://chromium-review.googlesource.com/200419
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 6556f16d2ae7f11a2cd696c8594518342d72e73e)
Reviewed-on: https://chromium-review.googlesource.com/201169
CHROMIUM: clk: tegra124: add flag TEGRA_PLL_ACCURATE for pll_dp

We need clock rate of "PLL_DP" to be accurate, add flags
TEGRA_PLL_ACCURATE for clock "PLL_DP".

BUG=chrome-os-partner:28128
TEST=Read clock rate of pll_dp in clk_summary, it should be 270MHz
     instead of 268MHz.

Change-Id: I4208b849558daa48c0bf370f561ec64cfb6a57fc
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200542
Tested-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: <pdeschrijver@nvidia.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 277b049356a4b088fda2eb4e4305981489260522)
Reviewed-on: https://chromium-review.googlesource.com/200816
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: clk: tegra: fix VCO rate

Fix VCO rate by taking vco_min into account.

BUG=chrome-os-partner:28128
TEST=check if the calculated VCO rate is bigger than the VCO_MIN, it
     should be.

Change-Id: I74ebda42f0c252002194d487d3d8c033ce34f9b0
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200527
Tested-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: <pdeschrijver@nvidia.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit f16318ca13357ab8f26951f381b6863ebf1b9771)
Reviewed-on: https://chromium-review.googlesource.com/201311
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: mmc: tegra: use HW timeout corresponding to SW value

tegra_sdhci_issue_tuning_cmd() currently programs the maximum available
timeout value, which corresponds to about 650ms at 200Mhz, into
SDHCI_TIMEOUT_CONTROL, but we only poll SDHCI_INT_STATUS for 5ms before
giving up and resetting the controller.  Writes to SDHCI_SOFTWARE_RESET,
however, may stall until in-progress command has timed out, causing the
entire system to hang for that time.  Removing an SD card during tuning,
for example, could cause the entire system to hang for 100s of ms.
Instead of using the maximum timeout value, choose one which is about
equal to what we'll wait for in software before timing out and resetting.

BUG=chrome-os-partner:28547
TEST=Build and boot on Big

Change-Id: Ib30a9b2cd6cb114a8e74f83bf59513d5bf2dd763
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201158
Reviewed-by: Christopher Freeman <cfreeman@nvidia.com>
Tested-by: Christopher Freeman <cfreeman@nvidia.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
(cherry picked from commit eb7c23766ec20d9aa5163614b4f34a3995831e5c)
Reviewed-on: https://chromium-review.googlesource.com/201321
CHROMIUM: mmc: tegra: mdelay to usleep

Use sleep during tuning

BUG=chrome-os-partner:28547
TEST=Youtube video clip while inserting/removing SD card

Change-Id: I740faf94d3414203392417a23c12aa863f42878b
Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200164
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 3f84e93ac64bbb1f8d80dd9ab93f971652268609)
Reviewed-on: https://chromium-review.googlesource.com/200817
CHROMIUM: video: tegra: host: Do not dump channel if error

Do not dump channel state if the channel could not be initialized.

BUG=chrome-os-partner:29063
TEST=visit
https://www.khronos.org/registry/webgl/conformance-suites/1.0.0/extra/lots-of-polys-example.html
and let it run, see if it crashes the system

Change-Id: Ib1d8d0ccad0eb1254584e3fa6093c66921f36688
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/201071
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: Dylan Reid <dgreid@chromium.org>
(cherry picked from commit 0de3a927714852fea0f2fd5b424f1999b24ee615)
Reviewed-on: https://chromium-review.googlesource.com/201691
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: input: elants_i2c calibration support

This CL adds support for recalibrating elants_i2c touchscreens via a sysfs entry.
Besides, correct some problems revised:
1. Remove unnecessary comments.
2. Fix an incorrect output message.

BUG=None
TEST=on Elan touchscreen, boot and touchscreen works.

Original-change-Id: I77a4f1bdff5459d431d59755106ee78fe658dd18
Originally-signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Originally-signed-off-by: Liang Po-Hsiang <iamshyang@gmail.com>
Originally-reviewed-on: https://chromium-review.googlesource.com/197005

Change-Id: I42afabe7a9813f7ba45f19562f6e3b2df7b144b6
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201744
Reviewed-by: Dylan Reid <dgreid@chromium.org>
CHROMIUM: input: elants_i2c version sysfs entries

This CL adds several sysfs entries for the elants_i2c driver allowing
the user to query the versions of various parts of the FW.

Besides, correct some problems revised:
1. Replace goto syntax with a for loop.
2. Fix an incorrect output message.
3. Eliminate some duplicate code.

BUG=None
TEST=on Elan touchscreen, boot and touchscreen works.

Original-change-Id: I06d24f08f810b6120ee8944ef1f228c57ee64854
Originally-signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Originally-signed-off-by: Liang Po-Hsiang <iamshyang@gmail.com>
Originally-reviewed-on: https://chromium-review.googlesource.com/197018

Change-Id: I54007c350828e26e4c080576ea514d4e6ab329e3
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201745
Reviewed-by: Dylan Reid <dgreid@chromium.org>
CHROMIUM: Input: elan_i2c - check (x,y) over max(x,y) or not before report to OS

Signed-off-by: Duson Lin <dusonlin@emc.com.tw>
BUG=chrome-os-partner:27907
TEST=on chromebook with Elan touchpad, boot and touchpad works.

Original-change-Id: Iad9bbc68caa043f925fa055fda407633c023069c
Originally-reviewed-on: https://chromium-review.googlesource.com/198633
Originally-reviewed-by: Chung-yih Wang <cywang@chromium.org>
Originally-reviewed-by: Benson Leung <bleung@chromium.org>
Originally-commit-queue: Chung-yih Wang <cywang@chromium.org>
Originally-tested-by: Chung-yih Wang <cywang@chromium.org>

Change-Id: Ia8a74c6c02d82c26216418fe2ab8c4d38d229668
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201746
Reviewed-by: Dylan Reid <dgreid@chromium.org>
CHROMIUM: input: elants_i2c fw update support

This CL adds in the sysfs entries that allow you to update the firmware
of your elan touch screen.  This is done by placing the fw binary in
/lib/firmware and then playing with the sysfs file.

Besides, correct some problems revised:
1. Remove unnecessary output message or comments.
2. Fix some coding style problem.
3. Fix a bad use of goto.
4. Change a goto loop to a while loop in elan_fw_update()

BUG=chromium:359286
TEST=Manual testing on a device with such a touch screen

Original-change-Id: Icebf425f0773870699f98ae90da4b9f9124d75f8
Originally-signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Originally-signed-off-by: Liang Po-Hsiang <iamshyang@gmail.com>
Originally-signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Originally-reviewed-on: https://chromium-review.googlesource.com/197056

Change-Id: I682f0c1b50cb012c7cf047771feae138fcfb9290
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201747
Reviewed-by: Dylan Reid <dgreid@chromium.org>
CHROMIUM: input: elants_i2c driver fix

Fix a bug for firmware without QUEUE_HEADER_NORMAL.

BUG=None
TEST=on Elan touchscreen, boot and touchscreen works.

Original-Change-Id: I76e2c987135e1de57b38bbf528afd76575b57987
Originally-signed-off-by: Liang Po-Hsiang <iamshyang@gmail.com>
Originally-reviewed-on: https://chromium-review.googlesource.com/198832
Originally-reviewed-by: Charles Mooney <charliemooney@chromium.org>
Originally-tested-by: Charles Mooney <charliemooney@chromium.org>
Original-commit-queue: Charles Mooney <charliemooney@chromium.org>

Change-Id: Ide36a247dd728bd0e984f65d215a628d82223582
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201748
Reviewed-by: Dylan Reid <dgreid@chromium.org>
CHROMIUM: config: blaze: enable elan touch screen driver in base.config

Add CONFIG_TOUCHSCREEN_ELAN=y in base.config to enable elan touch screen driver.

BUG=chrome-os-partner:27621
TEST=manual
build kernel which enable elan touch screen driver in base.config and update elan touch screen FW.
check if touch screen work or not

Originaly-change-Id: I42aecbfae54e4e2897d265016e5167729d2588e9
Originally-signed-off-by: Wisley Chen <Wisley.Chen@quantatw.com>
Originally-reviewed-by: Charles Mooney <charliemooney@chromium.org>
Originally-reviewed-on: https://chromium-review.googlesource.com/200539
Originally-tested-by: Chen Wisley <wisley.chen@quantatw.com>
Originally-commit-queue: Katie Roberts-Hoffman <katierh@chromium.org>

Change-Id: Iaeb0bc6899e6fe8ef6a16f6b5703e0ccdaa748ef
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201749
Reviewed-by: Dylan Reid <dgreid@chromium.org>
UPSTREAM: sched: Remove redundant update_runtime notifier

migration_call() will do all the things that update_runtime() does.
So let's remove it.

Furthermore, there is potential risk that the current code will catch
BUG_ON at line 689 of rt.c when do cpu hotplug while there are realtime
threads running because of enabling runtime twice while the rt_runtime
may already changed.

Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1365685499-26515-1-git-send-email-zhangwm@marvell.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit c5405a495e88d93cf9b4f4cc91507c7f4afcb901)

BUG=chrome-os-partner:29119
TEST=build and boot on nyan

Change-Id: I6809cb44998269e44458a6443f086f5bc05edd07
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201388
Reviewed-by: Dylan Reid <dgreid@chromium.org>
(cherry picked from commit 19b0497000e771645405db8c3cc2d703ea75ac91)
Reviewed-on: https://chromium-review.googlesource.com/201809
CHERRY-PICK: CHROMIUM: sdhci: Allow SHDCI Register Dump on Error

SDHCI driver would call sdhci_dumpregs() in case of many error
conditions. But pr_debug will not output anything unless changes
are made in both global kernel config and local file, which seems
to be excessive. Simply change to pr_err to get dump into dmesg.
This will save a lot of time by getting useful logs in case of
mmc error.

BUG=chrome-os-partner:29021
TEST=Manual: Check no extra reg dump in case of normal operation.

Change-Id: If6cff7cf7f54886186d99c907ab72ab32d4bbd23
Original-Change-Id: Iac0e403ddabdd72a4cada521b4b4309e13355915
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/201486
Commit-Queue: Bowgo Tsai <bowgotsai@chromium.org>
Tested-by: Bowgo Tsai <bowgotsai@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit 7be8ef7c2472f2c043bac47b9253b6f355ac110a)
Reviewed-on: https://chromium-review.googlesource.com/201910
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: mwifiex: fix a crash in extended scan event processing

[113.967694] Unable to handle kernel NULL pointer dereference
               at virtual address 00000020
............
[113.967859] PC is at mwifiex_update_rxreor_flags+0xfc/0x430
............
[113.968110] mwifiex_update_rxreor_flags+0xfc/0x430
[113.968129] mwifiex_handle_event_ext_scan_report+0x1e4/0x21c
[113.968148] mwifiex_process_sta_event+0x410/0x508
[113.968165] mwifiex_process_event+0x184/0x1e0
[113.968181] mwifiex_main_process+0x220/0x48c
[113.968197] mwifiex_sdio_interrupt+0xc8/0x1cc
[113.968210] sdio_irq_thread+0x11c/0x290

In case of legacy scan, adapter->curr_cmd is guranteed to be
non-NULL in check_next_scan_cmd. This may not be case in
extended scan where scan command response would come earlier and
set curr_cmd to NULL. Extended scan event comes later and while
trying to complete IOCTL for scan, driver would crash in
dereferencing adapter->curr_cmd->wait_q_enabled.

Avoid this by completing IOCTL in case of legacy scans only.
Internal scan would be completed while handling extended scan
command response.

Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>

BUG=chrome-os-partner:28835
TEST="while true; do echo scanning; iw mlan0 scan | grep SSID;
done" overnight test on Rambi. (My Rambi has problem running
suspend/resume test regardless this CL, so I didn't run
susspend_stress_test.) Since I'm unable to reproduce the crash
on Rambi using the scan loop, I reverted patch "UPSTREAM:
mwifiex: process event before command response" so that I can
get an immediate crash exactly same as above stack trace.
With this CL applied, the crash does not happen any more using
the scan script. Of course with patch "UPSTREAM: mwifiex:
process event before command response" and this CL alltogether
scan tests passed as well.

Change-Id: I864bbbf3f5d6e54fcc1894dff2ebaa40c3c80080
Reviewed-on: https://chromium-review.googlesource.com/201731
Reviewed-by: Paul Stewart <pstew@chromium.org>
Commit-Queue: Bing Zhao <bzhao@marvell.com>
Tested-by: Bing Zhao <bzhao@marvell.com>
(cherry picked from commit 89d2126cd0422aa504dd4c8a59119bba84ba4c2d)
Reviewed-on: https://chromium-review.googlesource.com/202161
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
CHROMIUM: memory: tegra124: export vpr check function

The VPR should be locked down before enabling GPU. This
patch exports the vpr check function, and then the GPU
driver can verify the VPR status by this.

BUG=None
TEST=System boots ok on Big

Change-Id: I0d3dc0827786958064cc5f81852e11e89da462a5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/200524
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 518bb99821e288c2caae2a3e3dd585f2671f2e3b)
Reviewed-on: https://chromium-review.googlesource.com/202177
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: Dylan Reid <dgreid@chromium.org>