[ARM] Use std::swap instead of manually swapping

	* config/arm/arm.md (unaligned_loaddi): Use std::swap instead of
	manual swapping implementation.
	(movcond_addsi): Likewise.
	* config/arm/arm.c (arm_canonicalize_comparison): Likewise.
	(arm_select_dominance_cc_mode): Likewise.
	(arm_reload_out_hi): Likewise.
	(gen_operands_ldrd_strd): Likewise.
	(output_move_double): Likewise.
	(arm_print_operand_address): Likewise.
	(thumb_output_move_mem_multiple): Likewise.
	(SWAP_RTX): Delete.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217701 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-18  Marc Glisse  <marc.glisse@inria.fr>

	* tree.c (element_mode, integer_truep): New functions.
	* tree.h (element_mode, integer_truep): Declare them.
	* fold-const.c (negate_expr_p, fold_negate_expr, combine_comparisons,
	fold_cond_expr_with_comparison, fold_real_zero_addition_p,
	fold_comparison, fold_ternary_loc, tree_call_nonnegative_warnv_p,
	fold_strip_sign_ops): Use element_mode.
	(fold_binary_loc): Use element_mode and element_precision.
	* match.pd: Use integer_truep, element_mode, element_precision,
	VECTOR_TYPE_P and build_one_cst. Extend some transformations to
	vectors. Simplify A/-A.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217702 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-18  Hale Wang  <hale.wang@arm.com>

	* gcc.target/arm/small-multiply-m0-1.c: Only apply when
	"-mcpu=cortex-m0/m1/m0plus.small-multiply".
	* gcc.target/arm/small-multiply-m0-2.c: Likewise.
	* gcc.target/arm/small-multiply-m0-3.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
	* gcc.target/arm/small-multiply-m1-1.c: Likewise.
	* gcc.target/arm/small-multiply-m1-2.c: Likewise.
	* gcc.target/arm/small-multiply-m1-3.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217703 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/testsuite
	* c-c++-common/tm/safe-3.c: Add bind_pic_locally.
	* g++.dg/ipa/devirt-15.C: Ditto.
	* g++.dg/ipa/devirt-7.C: Ditto.
	* g++.dg/ipa/pr60600.C: Ditto.
	* g++.dg/opt/vt2.C: Ditto.
	* g++.dg/opt/vt4.C: Ditto.
	* g++.dg/pr48484.C: Ditto.
	* g++.dg/tm/pr47746.C: Ditto.
	* g++.dg/tree-ssa/pr57380.C: Ditto.
	* gcc.dg/ipa/inline-4.c: Ditto.
	* gcc.dg/ipa/inlinehint-1.c: Ditto.
	* gcc.dg/ipa/inlinehint-2.c: Ditto.
	* gcc.dg/ipa/inlinehint-3.c: Ditto.
	* gcc.dg/pr47276.c: Ditto.
	* gcc.dg/pure-2.c: Ditto.
	* gcc.dg/tm/nested-2.c: Ditto.
	* gcc.dg/tree-ssa/alias-29.c: Ditto.
	* gcc.target/i386/3dnow-1.c: Ditto.
	* gcc.target/i386/3dnow-2.c: Ditto.
	* gcc.target/i386/3dnowA-1.c: Ditto.
	* gcc.target/i386/3dnowA-2.c: Ditto.
	* gcc.target/i386/avx-1.c: Ditto.
	* gcc.target/i386/avx-2.c: Ditto.
	* gcc.target/i386/memcpy-1.c: Ditto.
	* gcc.target/i386/mmx-1.c: Ditto.
	* gcc.target/i386/mmx-2.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-22a.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* gcc.target/i386/sse-24.c: Ditto.
	* gcc.target/i386/vect-double-1.c: Ditto.
	* g++.dg/fstack-protector-strong.C: Add target nonpic.
	* gcc.dg/fstack-protector-strong.c: Ditto.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217704 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64]Replace temporary assembler for vld1_dup

        * config/aarch64/arm_neon.h (vld1_dup_f32, vld1_dup_f64, vld1_dup_p8,
        vld1_dup_p16, vld1_dup_s8, vld1_dup_s16, vld1_dup_s32, vld1_dup_s64,
        vld1_dup_u8, vld1_dup_u16, vld1_dup_u32, vld1_dup_u64, vld1q_dup_f32,
        vld1q_dup_f64, vld1q_dup_p8, vld1q_dup_p16, vld1q_dup_s8, vld1q_dup_s16,
        vld1q_dup_s32, vld1q_dup_s64, vld1q_dup_u8, vld1q_dup_u16,
        vld1q_dup_u32, vld1q_dup_u64): Replace inline asm with vdup_n_ and
        pointer dereference.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217705 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-18  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/vcls.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcvt.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vext.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vget_high.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vget_low.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217706 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-18  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/neon-testgen.ml (emit_prologue): Handle new
	compile_test_optim argument.
	(emit_automatics): Rename to emit_variables. Support variable
	indentation of its output.
	(compile_test_optim): New function.
	(test_intrinsic): Call compile_test_optim.
	* config/arm/neon.ml (features): Add Compiler_optim.
	(ops): Add Compiler_optim feature to Vbic and Vorn.
	(type_in_crypto_only): Replace 'or' by '||'.
	(reinterp): Likewise.
	(reinterpq): Likewise.

	testsuite/
	* gcc.target/arm/neon/vbicQs16.c: Regenerate.
	* gcc.target/arm/neon/vbicQs32.c: Likewise.
	* gcc.target/arm/neon/vbicQs64.c: Likewise.
	* gcc.target/arm/neon/vbicQs8.c: Likewise.
	* gcc.target/arm/neon/vbicQu16.c: Likewise.
	* gcc.target/arm/neon/vbicQu32.c: Likewise.
	* gcc.target/arm/neon/vbicQu64.c: Likewise.
	* gcc.target/arm/neon/vbicQu8.c: Likewise.
	* gcc.target/arm/neon/vbics16.c: Likewise.
	* gcc.target/arm/neon/vbics32.c: Likewise.
	* gcc.target/arm/neon/vbics64.c: Likewise.
	* gcc.target/arm/neon/vbics8.c: Likewise.
	* gcc.target/arm/neon/vbicu16.c: Likewise.
	* gcc.target/arm/neon/vbicu32.c: Likewise.
	* gcc.target/arm/neon/vbicu64.c: Likewise.
	* gcc.target/arm/neon/vbicu8.c: Likewise.
	* gcc.target/arm/neon/vornQs16.c: Likewise.
	* gcc.target/arm/neon/vornQs32.c: Likewise.
	* gcc.target/arm/neon/vornQs64.c: Likewise.
	* gcc.target/arm/neon/vornQs8.c: Likewise.
	* gcc.target/arm/neon/vornQu16.c: Likewise.
	* gcc.target/arm/neon/vornQu32.c: Likewise.
	* gcc.target/arm/neon/vornQu64.c: Likewise.
	* gcc.target/arm/neon/vornQu8.c: Likewise.
	* gcc.target/arm/neon/vorns16.c: Likewise.
	* gcc.target/arm/neon/vorns32.c: Likewise.
	* gcc.target/arm/neon/vorns64.c: Likewise.
	* gcc.target/arm/neon/vorns8.c: Likewise.
	* gcc.target/arm/neon/vornu16.c: Likewise.
	* gcc.target/arm/neon/vornu32.c: Likewise.
	* gcc.target/arm/neon/vornu64.c: Likewise.
	* gcc.target/arm/neon/vornu8.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217707 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-18  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/60771
	* g++.dg/cpp0x/constexpr-ref6.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217708 138bc75d-0d04-0410-961f-82ee72b054a4