one more call to find_in_path to fix
no whitespace required before module name
add support for vhdl
vhdl libraries
check -> ""
pass vhdl libraries to synthesis
vhdl components are submodules also
update synth.tcl for vhdl files and libraries
added board and part options
report per-pblock utilization
boardname and partname
reduced vivado noise
remove duplicates from include_dirs
removed debug chatter
fixed dependence of IMPL_RULE
fixed syntax error
fixed library name
fixed library name for real
buildcachedir -> buildcache