[msan] Stop propagating shadow in blacklisted functions.

With this change all values passed through blacklisted functions
become fully initialized. Previous behavior was to initialize all
loads in blacklisted functions, but apply normal shadow propagation
logic for all other operation.

This makes blacklist applicable in a wider range of situations.

It also makes code for blacklisted functions a lot shorter, which
works as yet another workaround for PR17409.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212265 91177308-0d34-0410-b5e6-96231b3b80d8
Revert of r212265.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212266 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Add missing attributes in MemorySanitizer tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212267 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Stop propagating shadow in blacklisted functions.

With this change all values passed through blacklisted functions
become fully initialized. Previous behavior was to initialize all
loads in blacklisted functions, but apply normal shadow propagation
logic for all other operation.

This makes blacklist applicable in a wider range of situations.

It also makes code for blacklisted functions a lot shorter, which
works as yet another workaround for PR17409.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212268 91177308-0d34-0410-b5e6-96231b3b80d8
Fix ppcf128 component access on little-endian systems

The PowerPC 128-bit long double data type (ppcf128 in LLVM) is in fact a
pair of two doubles, where one is considered the "high" or
more-significant part, and the other is considered the "low" or
less-significant part.  When a ppcf128 value is stored in memory or a
register pair, the high part always comes first, i.e. at the lower
memory address or in the lower-numbered register, and the low part
always comes second.  This is true both on big-endian and little-endian
PowerPC systems.  (Similar to how with a complex number, the real part
always comes first and the imaginary part second, no matter the byte
order of the system.)

This was implemented incorrectly for little-endian systems in LLVM.
This commit fixes three related issues:

- When printing an immediate ppcf128 constant to assembler output
  in emitGlobalConstantFP, emit the high part first on both big-
  and little-endian systems.

- When lowering a ppcf128 type to a pair of f64 types in SelectionDAG
  (which is used e.g. when generating code to load an argument into a
  register pair), use correct low/high part ordering on little-endian
  systems.

- In a related issue, because lowering ppcf128 into a pair of f64 must
  operate differently from lowering an int128 into a pair of i64,
  bitcasts between ppcf128 and int128 must not be optimized away by the
  DAG combiner on little-endian systems, but must effect a word-swap.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212274 91177308-0d34-0410-b5e6-96231b3b80d8
bug fix for PR20020: anti-dependency-breaker causes miscompilation

This patch sets the 'KeepReg' bit for any tied and live registers during the PrescanInstruction() phase of the dependency breaking algorithm. It then checks those 'KeepReg' bits during the ScanInstruction() phase to avoid changing any tied registers. For more details, please see comments in:
http://llvm.org/bugs/show_bug.cgi?id=20020

I added two FIXME comments for code that I think can be removed by using register iterators that include self. I don't want to include those code changes with this patch, however, to keep things as small as possible.

The test case is larger than I'd like, but I don't know how to reduce it further and still produce the failing asm.

Differential Revision: http://reviews.llvm.org/D4351



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212275 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM] Implement ISB memory barrier intrinsic

Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions
modelling by adding has-side-effects property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212276 91177308-0d34-0410-b5e6-96231b3b80d8
IR: cleanup Module::dropReferences

This replaces some old-style loops with range-based for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212278 91177308-0d34-0410-b5e6-96231b3b80d8
fixed typo in comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212279 91177308-0d34-0410-b5e6-96231b3b80d8
Add the -U flag to llvm-nm as an alias to -defined-only
as darwin’s nm(1) uses -U for this functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212280 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for inline asm symbols to IRObjectFile.

This also enables it in llvm-nm so that it can be tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212282 91177308-0d34-0410-b5e6-96231b3b80d8
fix configure+make build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212283 91177308-0d34-0410-b5e6-96231b3b80d8
Run interprocedural const prop before global optimizer

Exposes more constant globals that can be removed by
the global optimizer. A specific example is the removal
of the static global block address array in
clang/test/CodeGen/indirect-goto.c. This change impacts only
lower optimization levels. With LTO interprocedural
const prop runs already before global opt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212284 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for inline asm symbols in llvm-ar.

This should allow llvm-ar to be used instead of gnu ar + plugin in a LTO
build. I will add a release note about it once I finish a LTO bootstrap with it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212287 91177308-0d34-0410-b5e6-96231b3b80d8
LTO depends on Object now.

Fixes the build with only the ARM backend enabled. For some reason some
other backend was pulling Object and this went unnoticed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212288 91177308-0d34-0410-b5e6-96231b3b80d8
Move test since it now depends on the x86 backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212289 91177308-0d34-0410-b5e6-96231b3b80d8
Expand the note about llvm-ar now that inline asm works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212292 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.

This patch adds tablegen patterns to select F16C float-to-half-float
conversion instructions from 'f32_to_f16' and 'f16_to_f32' dag nodes.

If the target doesn't have F16C, then 'f32_to_f16' and 'f16_to_f32'
are expanded into library calls.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212293 91177308-0d34-0410-b5e6-96231b3b80d8
Add the -just-symbol-name (aka -j) flag to llvm-nm to just print the
symbol’s name.  On darwin the -j flag is used (often in combinations
with other flags) to produce a complete list of symbol names which
than can then be reorder and used with ld(1)’s -order_file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212294 91177308-0d34-0410-b5e6-96231b3b80d8
[CostModel][x86] Improved cost model for alternate shuffles.

This patch:
 1) Improves the cost model for x86 alternate shuffles (originally
added at revision 211339);
 2) Teaches the Cost Model Analysis pass how to analyze alternate shuffles.

Alternate shuffles are a special kind of blend; on x86, we can often
easily lowered alternate shuffled into single blend
instruction (depending on the subtarget features).

The existing cost model didn't take into account subtarget features.
Also, it had a couple of "dead" entries for vector types that are never
legal (example: on x86 types v2i32 and v2f32 are not legal; those are
always either promoted or widened to 128-bit vector types).

The new x86 cost model takes into account what target features we have
before returning the shuffle cost (i.e. the number of instructions
after the blend is lowered/expanded).

This patch also teaches the Cost Model Analysis how to identify and analyze
alternate shuffles (i.e. 'SK_Alternate' shufflevector instructions):
 - added function 'isAlternateVectorMask';
 - added some logic to check if an instruction is a alternate shuffle and, in
   case, call the target specific TTI to get the corresponding shuffle cost;
 - added a test to verify the cost model analysis on alternate shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212296 91177308-0d34-0410-b5e6-96231b3b80d8