Adding first hardware prototype of a parallel sort_demo.

The added parallelity is internal to the hardware: instead of having only one bubblesort engine, sorting one buffer, the
parallelized version has C_NUM_ENGINES number of bubblesort modules and buffers. The controlling state machine
gets one pointer, that points to a memory region of C_NUM_ENGINES * C_LOCAL_RAM_SIZE * 4 Bytes of data. It gets the data,
copies it to all internal buffers and lets all the bubblesort engines sort. After every engine finished, it transfers the
contents of the internal buffers back to main memory.

Software will follow in future commits
Commiting finished and tested version of parallelized sort_demo

This version of sort demo uses several sort engines per hwthread to increase area usage per thread.
The vhdl generic is named C_NUM_ENGINES and defaults to 4 engines per thread. The software define is called
PARALLELITY and has to match the C_NUM_ENGINES parameter.