char: emit the OPENED event only when a new char connection is opened

The OPENED event gets sent also when qemu resets its state initially.
The consumers of the event aren't interested in receiving this event
on reset.

Patchworks-ID: 35288
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
qdev: add string property.

Patchworks-ID: 35755
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge commit 'linux-user/linux-user-for-upstream' into staging
target-arm: use clz32() instead of a for loop

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
target-arm: fix sdiv helper

(INT32_MIN / -1) triggers an overflow, and the result depends on the
host architecture (INT32_MIN on arm, -1 on ppc, SIGFPE on x86). Use a
test to output the correct value.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
target-ppc: move often used CPU fields at the top of the structure

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: implement lzcnt emulation

lzcnt is a AMD Phenom/Barcelona added instruction returning the
number of leading zero bits in a word.
As this is similar to the "bsr" instruction, reuse the existing
code. There need to be some more changes, though, as lzcnt always
returns a valid value (in opposite to bsr, which has a special
case when the operand is 0).
lzcnt is guarded by the ABM CPUID bit (Fn8000_0001:ECX_5).

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: cleanup internal resource leaks

Revised patch for getting rid of tcg temporary variable leaks in
target-arm/translate.c. This version also includes the leak patch for
gen_set_cpsr macro, now converted as a static inline function, which I
sent earlier as a separate patch on top of this patch.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: optimize thumb 32-bit multiply

Current implementation of thumb mul instruction is implemented as a
32x32->64 multiply which then uses only 32 least significant bits of
the result. Replace that with a simple 32x32->32 multiply.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
sparc64: remove unused variables

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: convert eccmemctl to reset + vmsd

Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: convert slavio_misc to reset + vmsd

Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: add chipset docs for eccmemctl

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
escc: convert to VMState, vmsd and reset

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
escc: add chipset docs

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: convert cs4231 to VMState, vmsd and reset

Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
esp: convert to reset + vmsd

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
fdc: convert to reset + vmsd

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: convert slavio_timer to reset + vmsd

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
m48t59: convert to vmstate reset

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>