R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction

This s_mov_b32 will write to a virtual register from the M0Reg
class and all the ds instructions now take an extra M0Reg explicit
argument.

This change is necessary to prevent issues with the scheduler
mixing together instructions that expect different values in the m0
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222583 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass

We need to use a s_mov_b32 rather than a copy, so that CSE will
eliminate redundant moves to the m0 register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222584 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add a failing test case for offset order in ds_read2 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222585 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] remove old experimental code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222586 91177308-0d34-0410-b5e6-96231b3b80d8
Fix transformation of add with pc argument to adr for non-immediate
arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222587 91177308-0d34-0410-b5e6-96231b3b80d8