Introduce SIMD LIRs
Allocate SIMD Registers
Implement SIMD codegen for x86 and x64
Picked up Niko's CreateZeroedSIMDWrapper
Generate machine instructions for ToX4 and ToX4TypedObject
Introduce fpreg_value_t
Add Float32x4 and Int32x4 into Bailout
Fix the x86 port assertion
Add optimization test cases
Pick up Ivan's implementation of subps, mulps, divps, minps and maxps
Refactor the code a little bit so that we could use buider in MergeTypes
Introduce isX4Type, setX4TypeSet and getX4TypeSet for phi type inference
when building the MIR graph
Walk around an assertion in vm/Runtime.cpp, need investigation later.
Infer the phi node type for MIRType_float32x4 and MIRType_int32x4 and insert
the necessary conversions
Expose equals function to preparing inlining SIMD property access
Set up property inlining infrastructure
Gather SIMD instructions together
Introduce shufps and pshufd instructions
Add MIRType_float32x4 and MIRType_int32x4 into OsrValueTypeBarrier
Handle the MIRType_Undefined type in the entry block with MIRType_float32x4 and MIRType_int32x4