Initial check-in of the software.
Now compiles successfully
Initial CPLD directory check in
Initial vhdl file for cpld firmware
Added the gates and pin configurations.
Made the makefile start and run opencd and connect a gdb session to it automatically.
Pin settings according to the F4_daughter and discovery boards.
Completed the GPIO configurations
The program now runs and is uploaded via gdb without a hitch.
Modified the cpld firmware to support the screen
Merge branch 'software' since an initial build which permits to flash to the F4-Discovery is finished.