Add SZ_Y
Cleanup register decoding

Clean up register decoding to use a single function. The change
also introduces a new operand type OP_R0 .. OP_R7 for register
encodings in the opcode.
Add new test generator

This change replaces the testgen_opr.py based test generator with
a more inline operand generator. This allows for more flexible decision
making and reuse a lot of operand values.
Fix mmx encoding: add missing prefixes
Testing: cover rAX operands
Testing: cover fpu operands
Add debug macro that sets and logs u->error
Fix fxrstor, fxsave, movntq encodings
Testing: cover operand type M
Remove experimental SZ_A
Testing: log only the operand combos missing coverage
Fix encodings for ldmxcsr/stmxcsr
Fix encoding of lss
Testing: cover operands M, Gv, Gz (coverage at 30%)
Minor encoding fixes
Add operand type MwRy
Testing: add more operand generators (coverage=35%)
Skip intel specific isntruction in testing for now
Use intel notation for modrm.rm registers
Fix REX.R encoding for movq2dq