drm: adi_axi_hdmi: Allow to build as a module

Allow the adi_axi_hdmi driver to be built as a module.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Sync dts to latest changes in the PLL init code

Use device tree based init for the PLL clocks.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Sync zynq-zc702-adv7511-xcomm.dts to latest changes in the PLL init code

Use device tree based init for the PLL clocks.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
iio: Introduce a new fractional value type

Currently IIO uses a decimal fixed point representations for real type numbers.
This patch introduces a new representation for rational type numbers. The number
will be expressed by specifying a numerator and denominator. For converting a
raw value to a processed value multiply it by the numerator and divide it by the
denominator.

The reasoning for introducing this new type is that for a lot of devices the
scale can be represented easily by a fractional number, but it is not possible
to represent it as fixed point number without rounding.  E.g. for a simple DAC
the scale is often the reference voltage divided by the number of possible
values (Usually 2**n_bits - 1). Each driver currently implements the conversion
of this fraction to a fixed point number on its own.

Also when it comes to the in-kernel interface this allows to directly use the
fractional factors to convert a raw value to a processed value. This should on
one hand require less instructions and on the other hand increase the
precision.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
iio: Add a logarithmic fractional value type

For ADCs or DACs the denominator for fractional types often is a power of two.
In this case we can use a shift operation instead of the rather expensive 64 bit
division. This patch adds a new fractional type which expects the denominator to
be specified as the log2 of the actual denominator. E.g. for ADCs and DACs this
will usually be the number of significant bits.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

Conflicts:
	drivers/iio/inkern.c
zynq-zc706-adv7511-xcomm.dts: Fix DMA IRQ numbers

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
iio: axi_adc: Request probe deferral if the dma channel can be found

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
memory: zynq-smc: Add a terminating entry to the OF match table

Add a terminating entry to the OF match table of the zynq smc driver. Without
this the driver may bind to random devices who's compatibility string comes next
in memory.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
spi: xilinx-ps: Set SPI master mode bits

Properly setup master->mode_bits to the supported modes of the device. The SPI
core will check if a master can support the mode requested by a SPI slave
device. If mode_bits is not initialized the core will error out on all modes but
SPI_MODE_0.

Also get rid of the mode superfluous checks in xspips_setup_transfer() and
xspips_setup(). The SPI core will take care of making sure that this master can
support the salve device.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
spi: xilinx-ps: Introduce a timeout to the transfer completion

If the interrupt never kicks in, e.g. due to a peripheral malfunctions, the
driver will get stuck forever in xspips_start_transfer() for the completion to
complete. This patch adds a timeout to the completion so the driver can fail
gracefully and return an error if the interrupt never kicks in.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
spi: xilinx-ps: Make sure the SPI peripheral clock is fast enough

UG585 section 17.2.6 ("SPI Clocks") has the following statement:
"The SPI reference clock (spi_ref_clk) must be set to a higher frequency than
the CPU_1x clock frequency."

This patch makes sure that this is indeed the case. It will query the CPU_1x
frequency and if it is higher than the spi_ref_clk frequency it will set the
spi_ref_clk frequency to the CPU_1x frequency.

Without this patch about 1 in 5 SPI transactions don't get started and just time
out (When running the SPI clock at 100 MHz and CPU_1x at 111 MHz, a lower SPI
clocks should increase the failure rate). It seems as if the MANSTRT signal is
not properly synchronized and lost at the clock domain border. With the patch
applied I can run a million consecutive SPI transfers without a single failure.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
xilinx_emacps: Fix deadlock

The xilinx_emacps uses it's lock in an unsafe manner which leads to an
occasional deadlock. The lock is acquired inside the interrupt handler and also
in non-interrupt context without disabling interrupts first. So if the lock is
held in non-interrupt and the interrupt handler kicks in the interrupt handler
will spin forever on the lock waiting for it to be released. This patch fixes it
by using irq_lock_irqsave instead irq_lock in code which potentially runs in a
non-interrupt context.

Part of the issue was introduced in commit commit 4e4f61ba ("xilinx_emacps: Fix
for Rx lockdown HW issue").

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
spi: spi-xcomm: add gpio support

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
xilinx: afx: udpate device tree flash partitions

The u-boot was changed and now Linux device tree
flash partitions are being cleaned up to allow
for a bitstream to be up high in flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
usb: Correction to c67x00 TD data length mask

TD data length is 10 bits, correct TD_PORTLENMASK_DL. Reference
Cypress Semiconductor BIOS User's Manual 1.2, page 3-10

Signed-off-by: Dave Tubbs <dave.tubbs@portalislc.com>
usb: c67x00 RetryCnt value in c67x00 TD should be 3

RetryCnt value in c67x00 TD should be 3 (both bits set to 1). Reference
Cypress Semiconductor BIOS User's Manual 1.2, page 3-14

Signed-off-by: Dave Tubbs <dave.tubbs@portalislc.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
usb: Make sure each c67x00 TD has been executed

Make sure each c67x00 TD has been executed or retry using the existing
retry mechanism. Reference Cypress Semiconductor BIOS User's Manual 1.2,
page 3-16

Signed-off-by: Dave Tubbs <dave.tubbs@portalislc.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
memory: zynq-smc: Add a terminating entry to the OF match table

Add a terminating entry to the OF match table of the zynq smc driver. Without
this the driver may bind to random devices who's compatibility string comes next
in memory.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
usg: gadget: Simplify driver initialization

Use module_platform_driver macro which creates
init and exit functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
iio:ad5064: Fix address of the second channel for ad5065/ad5045/ad5025

The ad5065, ad5045, ad5025 use address '3' for the second channel, so they need
their own channel spec.

Note that ad5064_sync_powerdown_mode() also needs to be slightly updated since
it was relying on the fact that chan->address always equaled chan->channel.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>