Allow the register scavenger to spill multiple registers

This patch lets the register scavenger make use of multiple spill slots in
order to guarantee that it will be able to provide multiple registers
simultaneously.

To support this, the RS's API has changed slightly: setScavengingFrameIndex /
getScavengingFrameIndex have been replaced by addScavengingFrameIndex /
isScavengingFrameIndex / getScavengingFrameIndices.

In forthcoming commits, the PowerPC backend will use this capability in order
to implement the spilling of condition registers, and some special-purpose
registers, without relying on r0 being reserved. In some cases, spilling these
registers requires two GPRs: one for addressing and one to hold the value being
transferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177774 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Document usage of SmallVectorImpl in interfaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177775 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Slight reword for precision.

The new wording cannot be construed as suggesting the use of
SmallVectorImpl<T> as e.g. a class member (just because the class
happens to be in an interface).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177778 91177308-0d34-0410-b5e6-96231b3b80d8