drivers: video: tegra: Set correct clock for 3d

This patch ensures that 3d clock is set to its maximum when 3d
scaling is disabled.

Change-Id: I2ddbb3c0359b28477fbd7d637b468132353d64a7
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/131717
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
drivers: video: tegra: host: Faster queue cleanup

If a job timeouts, remaining jobs in the queue (that came from the
same task) are handled with a small timeout (500ms).

Change-Id: I83539d4de3c38446f08c06b20899c1ba73b46c83
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/132562
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
video: tegra: host: Clear syncpt intr on disable

Clear syncpt interrupt status when disabling it. Otherwise the
interrupt might have been left asserted.

Bug 1042566

Change-Id: Ib20b05af8782630dd711d203c0155eec7628bcd3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133807
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: tegra: dc: remove unused pointer variable

fix Coverity issue
pointer 'win' is not used in context so remove it

bug 1046331

Change-Id: I3a6f962000591d93a017eb2065da7aff01796b35
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134016
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Adam Cheney <acheney@nvidia.com>
video: tegra: dc: Use more exact error messages.

Describe DC CRC related error messages more precisely to be able to
distinguish the errors from each other based on the kernel log.

Bug 1039940

Change-Id: I9853e4a508df27c87d30a8ae4e72aaa16fae6a9b
Signed-off-by: Tuomas Kulve <tkulve@nvidia.com>
Reviewed-on: http://git-master/r/130645
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
video: tegra: dc: remove dereference of null pointer

fix coverity issue
pointer 'dc' is dereferenced after null checking
so use pr_err instead of dev_err

bug 1046331

Change-Id: I51a56870d19d2bf1f44875d29d3fddd670af5159
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
video: tegra: host: Make rate requests per clock

Change the IOCTLs for getting and setting the clock rate for a
module to allow setting each clock separately. Clock is specified
with module id.

Bug 1046244

Change-Id: I184e823d51deb1535f0b5267d98881ae264e7407
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132568
Reviewed-by: Automatic_Commit_Validation_User

Conflicts:
	drivers/video/tegra/host/t114/t114.c
	include/linux/nvhost.h
drivers: video: tegra: Use workqueues in SP ISRs

Bug 1041375

Change-Id: I2a0e53b325eafa61676febddb8c5b7cb0f4b7803
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/135043
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
tegra:dc: Init  default mode on HDMI

Set default videomode on DC before enabling HDMI.When running
framebuffer console on HDMI, a default mode must be set before
calling init, else tegra_dc_init will fail due to 0 pclk.

Bug 1046489
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: If9360a0d037e6dd9d1f205d8092b4da2a71ce5bf
Reviewed-on: http://git-master/r/134814
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
video: tegra: host: Empty name for undefined syncpts

Return empty name if syncpt name is not defined.

Bug 982965

Change-Id: Ib6d670f716b1781f3128e5703582cfcc60c35d27
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/134270
(cherry picked from commit a94a3a90b823c725ee6809133a4b6cb4c0441375)
Reviewed-on: http://git-master/r/139589
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: tegra: dc: handle function return value

fix coverity issue
variable 'ret' is used to handle return value

bug 1046331

Change-Id: I20f848216b4a1adbf4dad2f004395e6791c66457
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134396
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Video: tegra: dc: Re-enable DC for mode change

Re-enable DC to recflect a video mode change.

Bug 1056767
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: I70c0a29aecaf5ef05a7375b2b9e999c05ad7cd5d
Reviewed-on: http://git-master/r/139702
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
drivers: video: tegra: host: Init workqueue once

The workqueue was initialized every time the device woke up from
suspend. This patch fixes this issue.

Bug 1057478

Change-Id: I188511405dbcd536343e7f19f890e490a6a6a2df
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/140851
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
video: tegra: host: Clean up mem alloc code paths

Clean up code paths for failed allocations.

Change-Id: I0086127202ef875a9552429a51800088a23b755e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135084
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Conflicts:
	drivers/video/tegra/host/gr3d/gr3d_t114.c
	drivers/video/tegra/host/msenc/msenc.c
	drivers/video/tegra/host/tsec/tsec.c
video: tegra: host: Support multiple mem types

Support multiple memory handle types.

Change-Id: Ieae49d93be88616dde2498da98c66671cb3090a3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135085
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: host: Make 3D reg read device op

Make 3D register read an operation of the 3D device. For now,
implement it for Tegra20 and use the same implementation on other
chips.

Bug 1038891

Change-Id: Ic483d3554c5a3bad38d54043997a2a416cf37ea9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/129951
Reviewed-by: Automatic_Commit_Validation_User

Conflicts:
	drivers/video/tegra/host/gr3d/gr3d.c
video: tegra: host: Use 3D DW for register read

Use 3D direct to memory write for reading 3D registers.

Bug 1038891

Change-Id: I9dc17ea988b6946d5f8748fd22ae3589d42cdef0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: tegra: host: Use sg_table for DMA addresses

Use scatter-gather list for storing DMA addresses. This will allow
us to use DMA addresses from non-nvmap memory managers.

Change-Id: Id4a56ef5772a0d08b964336c51b06aa2b8432fe3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135086
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Conflicts:
	drivers/video/tegra/host/gr3d/gr3d.c
	drivers/video/tegra/host/gr3d/gr3d_t114.c
	drivers/video/tegra/host/mpe/mpe.c
	drivers/video/tegra/host/msenc/msenc.c
	drivers/video/tegra/host/msenc/msenc.h
	drivers/video/tegra/host/tsec/tsec.c
	drivers/video/tegra/host/tsec/tsec.h
video: tegra: host: Pin each gather only once

Pin each gather only once. For each gather pinned, we copy the
acquired address to the rest of the gathers with the same memory
handle.

Change-Id: I47442cd5a167042b12a7fb4760a7ef0b83bdb9bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139301
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: host: Add dmabuf support

Change-Id: I316fc5b8cc748b29e4f9776e27610d7468682311
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139302
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>