Corrected the MAX_FRAME_PAYLOAD value in aes220Dev.h from 65536 to 65535.

65536 requires 3 bytes but there are only 2 bytes being sent to the FPGA for the size of the transfer so transfer size was truncated
to 0 resulting in a time out error.
Modified handling of PKT_END signal in aes220_FX2_Interface_ent so as not to assert it if the transfer is the size of a FX2 buffer (512 bytes).
Also removed the call to a linux library when building aesUSB.cpp for a win32 architecture.

Sebastien Saury 20.08.2013
Modified the commit signal in aes220_Library_V1.2.2.vhd. This solves an empty packet being committed if sending a
buffer of 512 bytes or multiple thereof.
Corrected names of variables in function declaration in include file aesUSB.h

Sebastien Saury 27.08.2013
Modified aes220_Library_V1.2.2.vhd. Now aes220_Library_V1.2.3.vhd:
Removed redundant register loop in PipeOut entity.

Sebastien Saury 27.08.2013
Modified the turn3v3On/Off functions so they write the status of the 3.3V rail to the EEPROM on the board.

The modification means that the board will now returns to the set 3.3V rail status on power up.
i.e. if the 3.3V rail is set to OFF then on of the first thing the micro-controller will do on power up will be to turn
it OFF. Note that this will prevent the FPGA from configuring if no 3.3V is provided externally.
However it allows for the board to be stacked up with only one board providing the 3.3V (or none if the 3.3V is provided
externally).

Sebastien Saury

29.08.2013
GUI now displays and allow to set the status of the 3.3V rail on the board(s) plugged in via radio buttons.

Sebastien Saury 09.09.2013
Added new vhdl library (1.3) and moved previous one to archives folder.
New library is using a ready/valid interface.

Added a FIFO example to show how to use the new library.

Changed the DLLEXPORT switch in aes220_API.h so files can make use of it in a pure C program.

Sebastien Saury 17.10.2013