msm_fb: Make sure MDP clock is ON during register access

Change to make sure that MDP clock is ON while accessing
MDP fixed arbitration read and write selection
registers. This avoids target freeze due to unclocked
register access.

CRs-fixed: 505154
Change-Id: I1d2e654c7b97ca51e42611a5bd3aefd65421bcf4
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm: camera: Fix for kernel panic

check if buffer instance handle is zero while
getting pcam instance based on instance handle
in msm_mctl_reserve_free_buf function

Change-Id: Id3861c4f29fb4f7fd62ad6de6597e65c7c4f656b
Signed-off-by: manish gotefode <mgote@codeaurora.org>
net: rmnet_usb: silence URB submission errors during disconnect

URB submissions will fail with -ENODEV while the device is being
disconnected.  The current code prints error message for an URB
submission failure.  If too many URBs are submitted during the
disconnect window, then target is crashing due to excessive
console logging.

CRs-Fixed: 507556
Change-Id: I287c5021bacb2238b62bf78a8ddf887f588b6f16
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
msm-camera: Removing MSM_GMN_IOCTL_TEST_DUMP_REGION ioctl

Removing the MSM_GMN_IOCTL_TEST_DUMP_REGION call because this
is not used.

CRs-Fixed: 496905
Depends-on: 372524

Change-Id: I91147bbf67055351a115687a18a1172a649d5d6a
Signed-off-by: Katta Santhisindhu <kattas@codeaurora.org>
msm_fb: Avoid MDP mixer reset from ISR context

During DSI error interrupt handling, we currently try to do
MDP mixer reset. Avoid this since MDP clock control happens
in mixer reset which is not correct in ISR context. Schedule
a workqueue instead to call mixer reset as a separate thread.

CRs-fixed: 508882
Change-Id: Ie5471a01d79b4d8b67d8bb78647c407c35acae65
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Merge "msm: camera: Fix for kernel panic"
Merge "msm-camera: Removing MSM_GMN_IOCTL_TEST_DUMP_REGION ioctl"
Merge "msm_fb: Avoid MDP mixer reset from ISR context"
power: pm8921-bms: Fix SOC fluctuations at 100%

It is observed that the SOC can oscillate between 100-99-100
based on OCV updates after EOC (it is possible that there are
multiple varying OCV updates as the battery settles down).
Prevent this by avoiding the SOC to increase if it has dropped
and not charging.

While handling this scenario make sure that we do not scale
when soc = 100 and charging.

CRs-Fixed: 505132
Change-Id: Ie20c02d6df9407717c31e958b6b6f3e736325660
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Merge "net: rmnet_usb: silence URB submission errors during disconnect"
Merge "msm_fb: Make sure MDP clock is ON during register access"
Merge "power: pm8921-bms: Fix SOC fluctuations at 100%"
remove CONFIG_DONT_MAP_HOLE_IN_LOWMEM (again)
revert memory adjustment pulled from Moto 3.0 source
remove syscore ops from smd driver
Revert "[moto] adjust krait vmin"

This reverts commit 34ab610c0c44ba0e8ac00d2e708ca4668b8c20ab.
Fix mismerge

Change-Id: I807ee5f9fd4b86fca4d06f1b37132ead39134ccd
Merge tag 'AU_LINUX_ANDROID_JB_2.5.04.02.02.040.419' into cm-10.1-3.4.y

AU_LINUX_ANDROID_JB_2.5.04.02.02.040.419 based on quic/aosp/jb_2.5
Revert "mmi: Disable low-latency audio"

This reverts commit cacb85b735d0af818f964729b1418c2e66181e4d.
msm_serial_hs_hwreg.h: Correcting the even parity and odd parity bits

Currently parity bits are defined to be used with UART_DM_MR2
register with PARITY_MODE Bit as below :
EVEN_PARTIY = 1 and ODD_PARITY = 2
With these values, UART functionality doesn't work after enabling parity.
Hence adding correct used PARITY_MODE bits value as
EVEN_PARITY = 2 and ODD_PARITY = 1
after confirming with UART hardware programming guide.

CRs-Fixed: 410377
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
(cherry picked from commit fd40e5f6313fbc74e8897927be1004faa5d9df08)

Change-Id: I56f1a46ab56a7976ad00fc1329ad766b1182cb4e
Signed-off-by: Neha Pandey <nehap@codeaurora.org>