Merge branch 'x86-next', remote-tracking branch 'upstream/master' into x86-next
[x86] Beautification in keyboard and ioapic.

o Added names for IOAPIC's before regiestering
  irq chip.
o Changed the name for i8042 aux and keyboard.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Merge pull request #20 from hschauhan/x86-next

X86 next
[LIBS] Added strlcpy() string API

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Rename arch specific spinlock_t to arch_spinlock_t

The arch provides spinlock_t and core code defines vmm_spinlock_t.

To provide linux compatible spinlock_t in drivers/include/linux/spinlock.t
we rename spinlock_t to vmm_spinlock_t which comflicts with original
arch specific spinlock_t.

This patch fixes spinlock_t conflict by naming arch specific lock as
arch_spinlock_t

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Make host irq handler prototype similar to linux irq handler

This patch makes host irq callback handler very similar to linux
irq handler so that it easier to port drivers from linux to xvisor.

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Added EBUSY error code to linux compatiblity header

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Add linux-like snprintf() for linux compatiblity

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Add dummy linux compatible rcupdate.h

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Add linux compatible completion event APIs

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Improve linux compatible linux/interrupt.h

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Improve linux compatible linux/module.h

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Make i8042 driver more similar to linux i8042 driver

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Make atkbd driver more similar to linux atkbd driver

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge branch 'x86-next', remote-tracking branch 'upstream/master' into x86-next
[ARM] Moved MMU code for LPAE into arm/cpu/common/

MMU code for LPAE can be shared between arm32ve and arm64 so we move it
into arch/arm/cpu/common/

Signed-off-by: Sukanto Ghosh <sukantoghosh@gmail.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Remove dependency on cpu_defines.h from mmu_lpae.c

Signed-off-by: Sukanto Ghosh <sukantoghosh@gmail.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
x86_64: Make irq_flags_t as unsigned long

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
x86_64: Misc cleanups and fixes in MMU

The x86_64 MMU code assumed VAPOOL to be separate from code space,
but actually VAPOOL includes code space and VAPOOL starts at
code start virtual address.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
x86_64: More generic MMU implementation

This patch almost re-designs current x86_64 MMU.

The new MMU implementation is inspired from LPAE MMU of the
ARM port.

The ARM LPAE MMU is a close cousine of x86_64 MMU hence the
new implementation has same skeletal APIs as LPAE MMU.

In addition, we also move away from the current approach of
assuming VA == PA for Xvisor x86_64 address space.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>