Fix thumbv5e frame lowering assertion failure.

It is possible that frame pointer is not found in the
callee saved info, thus FramePtrSpillFI may be incorrect
if we don't check the result of hasFP(MF).

Besides, if we enable the stack coloring algorithm, there
will be an assertion to ensure the slot is live.  But in
the test case, %var1 is not live in the prologue of the
function, and we will get the assertion failure.

Note: There is similar code in ARMFrameLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175616 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] instrument invoke insns with noreturn attribute (as well as call insns)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175617 91177308-0d34-0410-b5e6-96231b3b80d8
I optimized the following patterns:
 sext <4 x i1> to <4 x i64>
 sext <4 x i8> to <4 x i64>
 sext <4 x i16> to <4 x i64>
 
I'm running Combine on SIGN_EXTEND_IN_REG and revert SEXT patterns:
 (sext_in_reg (v4i64 anyext (v4i32 x )), ExtraVT) -> (v4i64 sext (v4i32 sext_in_reg (v4i32 x , ExtraVT)))
 
 The sext_in_reg (v4i32 x) may be lowered to shl+sar operations.
 The "sar" does not exist on 64-bit operation, so lowering sext_in_reg (v4i64 x) has no vector solution.

I also added a cost of this operations to the AVX costs table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175619 91177308-0d34-0410-b5e6-96231b3b80d8
Move the SplatByte helper to APInt and generalize it a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175621 91177308-0d34-0410-b5e6-96231b3b80d8
ADT/Optional.h: Appease msvc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175626 91177308-0d34-0410-b5e6-96231b3b80d8
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175627 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR15155: lost vadd/vsplat optimization.

During lowering of a BUILD_VECTOR, we look for opportunities to use a
vector splat.  When the splatted value fits in 5 signed bits, a single
splat does the job.  When it doesn't fit in 5 bits but does fit in 6,
and is an even value, we can splat on half the value and add the result
to itself.

This last optimization hasn't been working recently because of improved
constant folding.  To circumvent this, create a pseudo VADD_SPLAT that
can be expanded during instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175632 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r175626, "ADT/Optional.h: Appease msvc."

Sorry, I didn't cover +Asserts, by accident. :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175633 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
Add HexagonMCInst class which adds various Hexagon VLIW annotations.
In addition, this class also includes some APIs related to the
constant extenders.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175634 91177308-0d34-0410-b5e6-96231b3b80d8
Fix bug 14779 for passing anonymous aggregates [patch by Kai Nacke].

The PPC backend doesn't handle these correctly.  This patch uses logic
similar to that in the X86 and ARM backends to track these arguments
properly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175635 91177308-0d34-0410-b5e6-96231b3b80d8
Add a default constructor for LiveRange.

It is useful to be able to create temporary LiveRange object whose
members are filled in later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175639 91177308-0d34-0410-b5e6-96231b3b80d8
[ms-inline asm] Make the comment a bit more verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175641 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR15267

- When extloading from a vector with non-byte-addressable element, e.g.
  <4 x i1>, the current logic breaks. Extend the current logic to
  fix the case where the element type is not byte-addressable by loading
  all bytes, bit-extracting/packing each element.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175642 91177308-0d34-0410-b5e6-96231b3b80d8
Adding support for absolute relocations.  This occurs in ELF files when a relocation is given with no name and an undefined section.  The relocation is applied with an address of zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175643 91177308-0d34-0410-b5e6-96231b3b80d8
Add a LiveRangeUpdater class.

Adding new segments to large LiveIntervals can be expensive because the
LiveRange objects after the insertion point may need to be moved left or
right. This can cause quadratic behavior when adding a large number of
segments to a live range.

The LiveRangeUpdater class allows the LIveInterval to be in a temporary
invalid state while segments are being added. It maintains an internal
gap in the LiveInterval when it is shrinking, and it has a spill area
for new segments when the LiveInterval is growing.

The behavior is similar to the existing mergeIntervalRanges() function,
except it allocates less memory for the spill area, and the algorithm is
turned inside out so the loop is driven by the clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175644 91177308-0d34-0410-b5e6-96231b3b80d8
Use LiveRangeUpdater instead of mergeIntervalRanges.

Performance is the same, but LiveRangeUpdater has a more flexible
interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175645 91177308-0d34-0410-b5e6-96231b3b80d8
On PowerPC, the cache-flush instructions dcbf and icbi are treated as
loads. On FreeBSD, add PROT_READ page protection flag before flushing
cache.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175646 91177308-0d34-0410-b5e6-96231b3b80d8
Formatting, grammar

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175647 91177308-0d34-0410-b5e6-96231b3b80d8
SIGQUIT is a "kill" signal, rather than an "int" signal, in this context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175648 91177308-0d34-0410-b5e6-96231b3b80d8
Add comment in Memory.inc explaining r175646.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175650 91177308-0d34-0410-b5e6-96231b3b80d8