mmc: proactively issue bkops_start and refresh

Adding CMD56 implementation.
Doing the following for manfid 0x90 and FW revisions 0x73 and
0x7b (both are non-standard custom FW):
1. Adding change to issue BKOPS_START whenever 20 seconds have gone
by without any slow write operations.
2. Adding change to issue CMD56 to refresh (custom feature) 1 block
whenever 60 seconds have gone by without any slow write operations.

Corresponding changes are already there in embedded branches:
http://git-master/r/#change,93247
http://git-master/r/#change,97555

Bug 847037.
Bug 874256.
Bug 963737.

Change-Id: Ie36b52620a75320abfedc36d1408647b36eddb46
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/102259
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
mmc: core: adding new sysfs entry for prod_rev

Adding new sysfs entry for product revision which is needed by
mNAND health and status user space tool.

Bug 974823.

Change-Id: I4a07a5e6c1c81e2b7a4c1ed024e987e06f9f87c8
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
mmc: core: SDXC speed class support

Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be
issued to meet the class performance for speed class
recording. Adding mmc_speed_class_control() which should
be used by an AV recording app/utility before starting
recording on an SDXC card.

Bug 969360
Reviewed-on: http://git-master/r/39394
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/115685
(cherry picked from commit 04b8d1287a95e1882d956cdf7997015350408a3c)
Change-Id: Id567effb476ee580de3d49b70201ebae5a13360a
Reviewed-on: http://git-master/r/118038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
mmc: core: Add option to prevent eMMC sleep command

Host may now use MMC_CAP2_NO_SLEEP_CMD to disable the use
of eMMC sleep/awake command.

This option can be used when your platform has a buggy
kernel crash dump software, which is supposed to store
the dump on the eMMC, but is not able to wake up the eMMC
from sleep state.

In particular, failures have been seen with u-boot; even if
it is fixed there, platforms will be slow to update their
bootloader binaries.

Change-Id: I403f4b2a231dde087095a660189dc2f4e79edfd5
Signed-off-by: Ulf Hansson <ulf.hansson@stericsson.com>
Reviewed-by: Hanumath Prasad <hanumath.prasad@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Chris Ball <cjb@laptop.org>

Bug 1007644
Bug 936069

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I8b2834e154e338a97bd6d82f177809d47d318ff0
Reviewed-on: http://git-master/r/118914
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
mmc: core: Fix PowerOff Notify suspend/resume

Modified the mmc_poweroff to resume before sending the poweroff
notification command. In sleep mode only AWAKE and RESET commands are
allowed, so before sending the poweroff notification command resume from
sleep mode and then send the notification command.

PowerOff Notify is tested on a Synopsis Designware Host Controller
(eMMC 4.5). The suspend to RAM and resume works fine.

Change-Id: Ib4642a29e423aee6041a92cc72a388d677674ae3
Signed-off-by: Girish K S <girish.shivananjappa@linaro.org>
Tested-by: Girish K S <girish.shivananjappa@linaro.org>
Reviewed-by: Saugata Das <saugata.das@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>

Bug 1007644
Bug 936069

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I2e3d421c82eb765cb640876691ffe4818d7e146b
Reviewed-on: http://git-master/r/118918
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
sdhci: tegra: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I946771a8e92459464ce571295f96f197db25c061
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit beba2b34af7ff9313aed074342b9bb86b12620a8)
Reviewed-on: http://git-master/r/113391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
mmc: tegra: Fix SDR50 clock rate configuration

The host clock configuration in SDR50 mode is
incorrectly grouped with DDR50 mode due to which
DDR50 mode clock limits are wrongly applied even
in SDR50 mode.

Bug 965298

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111566
(cherry picked from commit 2ad290d477e8198bace22d2623856555f07b9bf9)

Change-Id: I5d3a446e39a349209e5842d385c1b728bfb7012e
Reviewed-on: http://git-master/r/116428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
mmc: tegra: clean up interrupts logic in tuning

Disable the normal interrupts signalling before
tuning and enable it only after the entire tuning
process is done.

Bug 860102

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111589
(cherry picked from commit 15a97f33f6cf1fc1c25441142f69f62ce5f7029b)
Change-Id: I9eba9af65a50928dc4bb475e06cbf401963751bc
Reviewed-on: http://git-master/r/116433
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Revert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"

Without the card clock, inband interrupt is not working on
some wifi chips.

Bug 981683

This reverts commit 0467657691ba046b492504272baf7c626d9a3713.

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/110826
(cherry picked from commit 33c8e504328387097ed0160082cce6b36b994bd8)
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6683720a9bda1f779a63133d8ca64a024c5d8a08
Reviewed-on: http://git-master/r/116707
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
mmc: tegra: Don't set MMC_PM_KEEP_POWER by default

For SDIO devices, MMC_PM_KEEP_POWER would be set
by wifi driver during suspend. It need not be set
by default.

Bug 1011349

Change-Id: I779a438b45afed2cc0fd7283d89c24e9049cfe39
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/118954
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
mmc: sdhci: Avoid power on/off during sleep

If eMMC sleep support is enabled, set MMC_PM_KEEP_POWER
to avoid host power off and power on. Instead, restore
the host context in resume.

Bug 1007644
Bug 936069

Change-Id: I74578bb1f9e297b3af6bd79b9215364334984836
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/118913
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Revert "mmc: host: Disable SDIO card clock when idle"

Without card clock, inband interrupt is not working on
some wifi chips.

Bug 981683

This reverts commit b31946b34507209f26c6d709e23fd1c0cedd25f8.

Change-Id: I2dd86edb2445bd6db7917adf509b7a018d31aaed
Reviewed-on: http://git-master/r/110839

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6f2266ac5b6bd9585272958b4b8a89af1b3cdffb
Reviewed-on: http://git-master/r/119009
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
mmc: tegra: treat compilation warning as error

- Add compilation flag to treat warning as error
- Modified sdhci-tegra.c to remove compile warning

bug 949219

Change-Id: I704ea95e3b8ca8862482b6793b71ca4e5114f832
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118036
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
mmc: host: tegra: get rid of tegra_gpio_enable()

The gpio mode of pin is configured when setting
direction and hence this call is no more required.

Change-Id: I2c9bce83a283f6ef45754075cf3b7b1bc5c1d9ac
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/119612
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
arm: tegra: sd: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I3c5e35ace422e5441535c2c0fe18545b53bbddc4
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit bffb7b917d52a3523af80db21322ec7ba5fd33f9)
Reviewed-on: http://git-master/r/113392
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>