Small improvements of using FLASH memory in STM32F1XX
Remove redundant access size argument in F4 flash code.
Change the way buffer for control requests data is allocated

Current way of having a globally, but weakly defined static buffer has
several shortcomings:
 - It forces user to have a certain "magic" byte array variable if
   they want to have a control buffer of different size.
 - Having a globally defined static array and a separate function to
   tell USB core about its size is error prone.
 - Its inner workings are not easily understandable form cursory look
   at API and one needs to go and look at the implementation code to
   connect all the pieces into a solid picture of how it works

This commit adds two parameters to 'usbd_init' call that allow user to
specify the pointer to the area of memory and a size of that memory
which would be used by the USB core to store the data received during
DATA stage of control requests. This approach, while further
complicating the prototype of 'usbd_init', provides user with more
flexibility allowing for any custom area of memory of any size to be
used as control buffer. It also forces user to provide both address
and memory size at the same time thus avoiding the possibility of user
redefining 'usbd_control_buffer', but not calling
'usbd_set_control_buffer_size' after that.
As requested (6 Feb 2013) change DMA interrupt flag names
in STM32/common, for dma_common_f24, to match those used in dma_common_f13.
Examples compile OK
STM32: moved timer_ic_set_polarity from timer_common_all to
f1/timer.
Added timer_ic_set_polarity to timer_common_f24 with
the enum tim_ic_pol now including trigger on both edges.
Changed timer_slave_set_polarity to use enum tim_et_pol
rather than tim_ic_pol.

In response to suggestion of stinkydiver73 on 24 March that
timers in all families have an option for triggers on both
edges, except F1.
[stm32] usart6 for F2/F4
[stm32] update doxy for usart_set_baudrate
lm4f: Properly set PLL divisor

rcc_set_pll_divisor() would take the number we wanted to divide the 400MHz
clock and put it directly in the RCC2 register. This caused the clock to always
be one speed tier slower than expected. The value of the divisor must be
decremented by 1, so a divisor of 5 will be written as 4 in the RCC2.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
lm4f: Fix include guard in nvic.h

The lm4f/nvic.h include guard was wrongfully named LIBOPENCM3_LM3S_NVIC_H.
This caused the lm3s/nvic.h include a few lines down to not be compiled.
Rename the inlcude guard to the more appropriate LIBOPENCM3_LM4F_NVIC_H.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
sam3x support.
sam3x: clean up gpio mess.
sam3x: Add some PMC convenience functions.
sam3x: Add USART registers and come convenience functions.
sam3x: Add gpio_init convenience function.
sam3x: Add some pwm convenience funcitons.
sam3x: Correct pmc_xtal_enable to use startup time parameter.
sam3x: Add missing return types to pwm functions.
sam3x: Add convenince functions for setting clocks and usart baudrate.
sam3x: Add usart funciton to enable rx interrupt.
Minor fix to compile functions in rtc.h