cappuccino/decode_execute: move all op control signals to one always block

Also, slightly reorganise the order of the other always blocks
cappuccino/decode_execute: remove reset logic from execute_rfd_adr

Value is don't care as long as the write enable signal is cleared.
cappuccino/decode_execute: clear execute_rf_wb in pipeline_flush_i
cappuccino/decode_execute: remove clear logic on opc_alu_xx

As long as the op_alu is deasserted, the value in those are don't care.
cappuccino/decode_execute: omit execute_immjbr_upper_o reset

Value is don't care until explicitly set.
ticktimer: whitespace cleanup
ticktimer: verilog 2001 style module args
ticktimer: optimize ttcr

Instead of checking all conditions when ttcr matches ttmr, break down
the logic into a 'clear' and a 'run' signal.