ARM: provide diagnostics on more writeback LDM/STM instructions

The set of circumstances where the writeback register is allowed to be in the
list of registers is rather baroque, but I think this implements them all on
the assembly parsing side.

For disassembly, we still warn about an ARM-mode LDM even if the architecture
revision is < v7 (the required architecture information isn't available). It's
a silly instruction anyway, so hopefully no-one will mind.

rdar://problem/15223374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193185 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-cov: fix a typo and rename a variable.

Rename Size to EndPos, which makes more sense because the variable
stores the last location of the blocks.

Patch by Yuchen Wu!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193189 91177308-0d34-0410-b5e6-96231b3b80d8