bluesleep: implement to support bluedroid

"#define BT_BLUEDROID_SUPPORT 1" -> support BlueDroid
"#define BT_BLUEDROID_SUPPORT 0" -> support BlueZ

Since BlueDroid does not use kernel space HCI driver now, we add the
below 2 /proc nodes to make BlueDroid able to send HCI events to
bluesleep driver.

write 1 to /proc/bluetooth/sleep/lpm -> equivalent to HCI_DEV_REG event
write 0 to /proc/bluetooth/sleep/lpm -> equivalent to HCI_DEV_UNREG event
write 1 to /proc/bluetooth/sleep/btwrite -> equivalent to HCI_DEV_WRITE event

Signed-off-by: Haley Teng <hteng@nvidia.com>
star: Register bluesleep uart for bluedroid
Minor mr1 updates
arm: tegra: Enable arm errata 764369

Enable arm errata 764369 for TEGRA_2x and 3x.
Bug 981223
Bug 885467

Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/104181
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Change-Id: Ie013dc1ed4f1417a72dda72ea2d079a6534c3933
ARM: tegra: clock: Update secondary pll dividers resume

During resume from LP0 on Tegra2 always enable pll secondary dividers
before clocks restoration (to make sure clock sources are enabled).
Restore actual secondary dividers settings after clocks are restored.

Bug 965928
Bug 953030

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>

Reviewed on http://git-master/r/#change,104661
(cherry picked from commit 6350d1fd475373779cf5110403717b2c84e723ba)

Reviewed-on: http://git-master/r/104698
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

Change-Id: I048e3f925daf02074312472afa667609a8338c15
mm: Ensure pte and pmd stores ordering.

Bug 974153
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

Reviewed-on: http://git-master/r/105215
(cherry picked from commit 25c3334f0e1ea6bde84c0514bad0eb1859566dba)

Reviewed-on: http://git-master/r/108446
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Change-Id: I3a77ce812fab77f785c488a3aac9d0bc66e8236d
ARM: Tegra: Star: restore old_fs during error scenarios

In case there are errors in accessing KERNEL_DS partition, then instead
bailing out immediately, restore the original partition and then bail
out.

Change-Id: Iebdf425f7a68170126717e2b76120fbe7401ef87
Signed-off-by: Varun Wadekar <varun.wadekar@gmail.com>
wm8994: Leave the AIF2 clock alone.

AIF1 is already left enabled, let's do the same with aif2
video: tegra: dc: use highest bandwidth setting

Apply the highest bandwidth setting before windows are programmed rather
than waiting for vblank.

Bug 914917

Change-Id: Iaaede9966191fdfc896bbbb19fbbadf9c4598bff
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/72301
Reviewed-by: Michael I Gold <gold@nvidia.com>
Tested-by: Michael I Gold <gold@nvidia.com>
Signed-off-by: Varun Wadekar <varun.wadekar@gmail.com>
sound: soc: tegra: wm8994: manage disabling of pll_a clock

During suspend if bias is set to off then disable the pll_a and
related clock only once.

Change-Id: I1f7c45d5aa3b1753c5f18c4743de8ee204940b31
Signed-off-by: Varun Wadekar <varun.wadekar@gmail.com>
tegra2_i2s: Do not call das_suspend

I have no idea of where this code came from, can't find it anywhere
in nvidia's trees (whatever that's worth...). So roll it back to
test if it has any impact on the AIFs' behavior
star: Initialize AIF2 registers to same values as GB

From the old nvodm codec config, GPIOs 1,2 and 6 are supposed to
be logic level input switches:

        NvU32 reg700 = 0xa101;
        NvU32 reg701 = 0xa101;
        NvU32 reg702 = 0x8100;
        NvU32 reg703 = 0x8100;
        NvU32 reg704 = 0x8100;
        NvU32 reg705 = 0xa101;
        NvU32 reg706 = 0x0100;
wm8994:Use mutex lock version wm8994 register read/write
This help solve the call bug.