tcg: Use TCGMemOp for TCGLabelQemuLdst.opc

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-i386: Use TCGMemOp within qemu_ldst routines

Step one in the transition, with constants passed down from tcg_out_op.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-i386: Tidy softmmu routines

Pass two TCGReg to tcg_out_tlb_load, rather than idx+args.

Move ldst_optimization routines just below tcg_out_tlb_load to avoid
the need for forward declarations.

Use TCGReg enum in preference to int where apprpriate.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-i386: Remove "cb" output restriction from qemu_st8 for i386

Once we form a combined qemu_st_i32 opcode, we won't be able to
have separate constraints based on size.  This one is fairly easy
to work around, since eax is available as a scratch register.

When storing variable data, this tends to merely exchange one mov
for another.  E.g.

-:  mov    %esi,%ecx
...
-:  mov    %cl,(%edx)
+:  mov    %esi,%eax
+:  mov    %al,(%edx)

Where we do have a regression is when storing constant data, in which
we may load the constant into edi, when only ecx/ebx ought to be used.

The proper way to recover this regression is to allow constants as
arguments to qemu_st_i32, so that we never load the constant data into
a register at all, must less the wrong register.  TBD.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-i386: Support new ldst opcodes

No support for helpers with non-default endianness yet,
but good enough to test the opcodes.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Convert to le/be ldst helpers

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Tidy variable naming convention in qemu_ld/st

s/addr_reg2/addrhi/
s/addr_reg/addrlo/
s/data_reg2/datahi/
s/data_reg/datalo/

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Convert to new ldst opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Improve GUEST_BASE qemu_ld/st

If we pull the code to emit the actual load/store into a subroutine,
we can share the reg+reg addressing mode code between softmmu and
usermode.  This lets us load GUEST_BASE into a temporary register
rather than attempting to add it piece-wise to the address.

Which lets us use movw+movt for armv7, rather than (up to) 4 adds.
Code size for pre-armv7 stays the same.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Convert to le/be ldst helpers

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Convert to le/be ldst helpers

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Support new ldst opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Support new ldst opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-alpha: Convert to new ldst opcodes

Or, partially.  The fundamental primitives for the port are gen_load_mem
and gen_store_mem, which take a callback to emit the memory operation.
For that, we continue to use the original inline functions that forward
to the new ops, rather than replicate the same thing privately.

That said, all free-standing calls to tcg_gen_qemu_* have been converted.
The 32-bit floating-point references now use _i32 opcodes, eliminating
a truncate or extension.

Signed-off-by: Richard Henderson <rth@twiddle.net>