tuna_ak_defconfig: Enable CC_OPTIMIZE_DEFAULT
Kernel Version: AK.100
OMAP4430: TWL data: update retention voltages to spec rev 0.6

Update retention voltages from Operating Conditions Data Manual
Addendum Revision 0.6 (August 2011).

Note: vdd_iva is used as TWL's vcore2 is common between OMAP4430
and OMAP4460 - hence the update is done for 4460 as well(follow
on patch updates rest of the domain voltages to the same voltage
for OMAP4460).

Change-Id: I68a561049f3faf54b877a4d6293682829ee99b62
Signed-off-by: Nishanth Menon <nm@ti.com>

Conflicts:
	arch/arm/mach-omap2/omap_twl.c
OMAP4460: TWL/TPS data: update retention voltages to spec rev 0.3

Update retention voltages from Operating Conditions Data Manual
Addendum Revision 0.3 (August 2011).

OFF voltage is also updated as per requirement of 4460 OFF mode
conditions.

Change-Id: I558f0a483911b2616d0a19f9272a03258e35904a
Signed-off-by: Nishanth Menon <nm@ti.com>
Add tuna_ak_debug_defconfig
tuna_ak_defconfig: PANIC_TIMEOUT=5
tuna_ak_defconfig: Default Governor HYPER
Kernel Version: AK.101
ARM: cache: assume 64-byte L1 cachelines for ARMv7 CPUs

To ensure correct alignment of cacheline-aligned data, the maximum
cacheline size needs to be known at compile time.

Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely
that there will be future ARMv7 implementations with the same line size)
then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline
size. For CPUs with smaller caches, this will result in some harmless
padding but will help with single zImage work and avoid hitting subtle
bugs with misaligned data structures.

Signed-off-by: Will Deacon <will.deacon@xxxxxxx>

Conflicts:
	arch/arm/mach-omap2/Kconfig
tuna_ak_defconfig: Sync RM_L1_CACHE_SHIFT

Conflicts:
	arch/arm/configs/tuna_ak_defconfig
Kernel Version: AK.102
tuna_ak_defconfig: Disable FRAME POINTER - Less Info Kernel
ARM: 7583/1: decompressor: Enable unaligned memory access for v6 and above

Modern GCC can generate code which makes use of the CPU's native
unaligned memory access capabilities.  This is useful for the C
decompressor implementations used for unpacking compressed kernels.

This patch disables alignment faults and enables the v6 unaligned
access model on CPUs which support these features (i.e., v6 and
later), allowing full unaligned access support for C code in the
decompressor.

The decompressor C code must not be built to assume that unaligned
access works if support for v5 or older platforms is included in
the kernel.

For correct code generation, C decompressor code must always use
the get_unaligned and put_unaligned accessors when dealing with
unaligned pointers, regardless of this patch.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Enable UNALIGNED_ACCESS for the new LZO algorithm to use. LZO decrompression is used on QCACHE so we benefit a little from the new and improved LZO code.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
cpufreq: Retain only online cpus in managed_policy->cpus

cpufreq's handling of cpu online event can incorrectly initialize
managed_policy->cpus to include offline cpus. This causes cpufreq
governors to include offline cpus in their idle time computation, which
causes frequency to shoot up beyond normal levels (on systems where 2 or
more cpus need to be synchronized wrt frequency change).

This frequency shootup was not seen prior to commit 21111be8 which
changed idle time accounting for offline cpus. Prior to commit 21111be8,
idle time statistics for offline cpus would include their offline time
as well. Post commit 21111be8, offline time is not included in a cpu's
idle time statistics.

As a result, ondemand (or other cpufreq) governors would see unchanged
idle time for offline cpus, causing them to interpret those (offline)
cpus as 100% busy, which is wrong.

This patch fixes the issue by modifying cpufreq's hotplug handling to
retain only online cpus in managed_policy->cpus field. cpufreq governors
would then skip such offline cpus from idle time calculations.

Change-Id: Id2eba8c0ec3367609369b2e42a4e1386ff2e7ab5
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
ARM: Fix negative idle stats for offline cpu

We see negative idle stats because of cpu dying without
cleaning up idle entry statistics. When a cpu is offline,
the most immediate thing you'd want to do is just call
into cpu_die() and not waste time calling notifier(IDLE_START).

CRs-Fixed: 414554
Change-Id: Iadc6a3ca39997e0ccf65d2a29b004e24b1b211a1
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
dynamic read-ahead from CG

Conflicts:
	block/blk-core.c
	include/linux/mm.h
gpu: pvr: bypass compat check if version is same but build # is different
Kernel Version: AK.103 - 4.2.1 Compatible
Revert "tuna_ak_defconfig: Default Governor HYPER"

This reverts commit 15566237db1a74df5fc385b5853c984665ca0c80.