Add ak-changelog.sh
OMAP4: cpuidle: Add last_residency trace event for residency profiling
OMAP4: cpuidle: Update target residencies to saner values - Thanks Thalamus
OMAP4: cpuidle: don't touch mpu and core state until CPU1 is off

MPU/Core logic and PD states shouldn't be changed until CPU1 is
completely off

Change-Id: Ia90126776e7bd7108c7b885c622df36323982cb0
Signed-off-by: Lianwei Wang <lian-wei.wang@motorola.com>
Signed-off-by: suilunlam <a0868997@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
OMAP4: cpuidle: Some obvious optimisations to the code path
OMAP2+: clock: Fix DPLL clock rounding

Function omap2_dpll_round_rate() succeeds only if it can find exact frequency.
But in current implmentations there are some frequencies that can't be rounded.
Function iterates frequencies that always lower than requested one.
For example 550MHz can be obtain from 38.4MHz reference by M=1375 and N=96,
but the closest MN pair that is tried is 1374/96.

It happens because of flooring scaled_rt_rp variable insted of rounding.
This patch should fix the issue.

Change-Id: Iceadcc695ac3376372b2fdaf29afe8f9454b891f
Signed-off-by: Taras Kondratiuk <taras@ti.com>
(cherry picked from commit 6f1c683adc7834a456e48fbcc0a2259c5ebb2d8b)
OMAP4: DSS: Implement workaround for Errata ID:i733.

Description of Errata i733:
Due to wrong timings, all register accesses transitioning through the L4
interconnect toward DSS are not reliable.

Workaround:
DSS register access should be addressed through the L3 interconnect.

This change fixes errata by using L3 for access to DSS in dss_hwmod
instead of L4.

Silicon Versions Impacted:
OMAP4430 ES1.0, ES2.0, ES2.1, ES2.2, ES2.3
OMAP4460 ES1.0, ES1.1
OMAP4470 ES1.0

Change-Id: Ie087b861ee653a3beeacba74c3afe7b1a0490ed4
Co-author: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Mykhailo Denysiuk <x0172934@ti.com>
(cherry picked from commit cc5ac11191aec5766b814062eb9b70cf754f5620)
OMAP4: clock: Fixing clock internal source selection for ABE ports

ABE ports need a mask of two bits in order to select the
correct internal source clock. This patch fix this mask that
was only one bit and was overlaping with source clock bits.

Change-Id: I8597efd9cec6707e815da39598a0adb7a3ce3c61
Signed-off-by: Israel Cepeda <icepeda@ti.com>
(cherry picked from commit a85258df4aa011cc65f6dab71f8b0d57d5b6f419)
OMAP4: Workaround the OCP synchronisation issue with 32K synctimer.

Backport from:
http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap.git;
a=commitdiff;h=68523f4233de5f233478dde0a63047b4efb710b8

Original comment:
On OMAP4, recently a synchronisation bug is discovered by hardware
team, which leads to incorrect timer value read from 32K sync timer
IP when the IP is comming out of idle.

The issue is due to the synchronization methodology used in the SYNCTIMER IP.
The value of the counter register in 32kHz domain is synchronized to the OCP
domain register only at count up event, and if the OCP clock is switched off,
the OCP register gets out of synch until the first count up event after the
clock is switched back -at the next falling edge of the 32kHz clock.

Further investigation revealed that it applies to gptimer1 and watchdog timer2
as well which may run on 32KHz. This patch fixes the issue for all the
applicable modules.

The BUG has not made it yet to the OMAP errata list and it is applicable to
OMAP1/2/3/4/5. OMAP1/2/3 it is taken care indirectly by autodeps.

By enabling static depedency of wakeup clockdomain with MPU, as soon as MPU
is woken up from lowpower state(idle) or whenever MPU is active, PRCM forces
the OCP clock to be running and allow the counter value to be updated properly
in the OCP clock domain.

The bug is going to fixed in future OMAP versions.

Change-Id: I3c7ff239c3dcac180fcae50c1b909d417b2b8e16
Reported-Tested-by: dave.long@linaro.org
[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer
and helped to test this patch]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
(cherry picked from commit 73152a98a25392a451bb0d588a1fbe2796b3c909)
OMAP4+: HSI: hsi_char: fix write poll timeout issue

hsi_char driver may fail to return (POLLOUT | POLLWRNORM) after a write() has
occured. Instead it returns 0, causing the poll() to timeout.

This is due to a race condition between hsi_char_write() and if_hsi_notify().
Write callback can occur very fast in response to hsi_write() and may cause the
poll_event flag to be first set by if_hsi_notify() but then cleared by
hsi_char_write(), remaining to 0 forever and causing poll() timeout.

Fix is to clear the flag ahead of hsi_write to avoid this.

Change-Id: Iacd18f0448c1933a16b0a54db2204cd74fc259b2
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
Reported-by: Christian Auby <christian.auby@stericsson.com>
(cherry picked from commit 690e59b8530d2f9335c764707c11d549ba089d09)
OMAP4: HSI: fix missing CAWAKE caused by modem wakeup spam trace

Removed trace every time modem wakes-up OMAP (can be several times per second).
This trace is called under interrupt context (PRCM int) and causes delay
in CAWAKE tasklet processing.

Change-Id: I4c856b0ff0f1b90cfe9fd0938441558ba59132a7
Reported-by: Gilles Bourgeois <gilles.bourgeois@renesasmobile.com>
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
(cherry picked from commit 5e49948e4bc0635438114db7156130f952be87b1)

Conflicts:

	arch/arm/mach-omap2/omap_hsi.c
tuna_ak_defconfig: Enable ZRAM, KSM, AIO
Deoptimize test similar to Krait Kernel - Thanks Morfic

Conflicts:
	Makefile
omap2plus: cpufreq: Modify lpj recalculation logic

Somethimes "mdelay" function provide delay
that several times shorter than it should be.

This happens because recalculating lpj
performed after switching OPP. In this case,
for short period of time, when OPP on MPU
was switched but lpj was not recalculated,
"udelay" function can provide incorrect
delay - upto 5 times shorter
(if OPP was switched from lowest to highest).

This patch changes lpj recalculation logic to:
if OPP will be switched to higher - recalculate lpj before switching OPP,
if OPP will be switched to lower - recalculate lpj after switching OPP.

Change-Id: I3258e756c471fd0258a849d712ab00f4e1279ea9
Signed-off-by: Sergii Postulga <x0153364@ti.com>
i2c: use usleep_range to wait instead of msleep

according to the docs msleep(1) means wait up 20ms. i2c bus probably
doesn't need to wait that long. Potential performance boost.
max17040_battery.c: Remove charging debug
OMAP2+: clock: Round clock to the closest possible frequency.

Currently clock is always rounded to frequency that is <= required.
It leads to not the best divider selection if requested frequncy is
slightly lower than the closest possible frequency.

This patch makes the best possible divider to be choosen.

Change-Id: I732dbf3e2c910b041434ded0df78dd6f85b7c7f4
Signed-off-by: Taras Kondratiuk <taras@ti.com>
(cherry picked from commit 39bcf9e2080885e5b4c5e2a1d3f59236bb6f82cf)
(cherry picked from commit 197e81b14f4bba111f3347ac0ed9048f8db1790c)
mmc: core: Fix possbile memory leak

Fix possible memory leak detected by kmemleak:

unreferenced object 0xc0f80f00 (size 64):
  comm "swapper/0", pid 1, jiffies 4294937508 (age 82.980s)
  hex dump (first 32 bytes):
    6d 6d 63 30 5f 64 65 74 65 63 74 00 72 79 2e 68  mmc0_detect.ry.h
    00 07 00 00 68 77 63 61 70 2e 68 00 02 00 00 70  ....hwcap.h....p
  backtrace:
    [<c010a1fc>] __kmalloc+0x164/0x220
    [<c01e1630>] kvasprintf+0x38/0x58
    [<c01e1668>] kasprintf+0x18/0x24
    [<c02fcf60>] mmc_alloc_host+0x114/0x1b4
    [<c0311c84>] msmsdcc_probe+0xc14/0x1fd8
    [<c022b40c>] platform_drv_probe+0x14/0x18
    [<c022a144>] driver_probe_device+0x144/0x334
    [<c022a394>] __driver_attach+0x60/0x84
    [<c022884c>] bus_for_each_dev+0x4c/0x78
    [<c0229720>] bus_add_driver+0xd0/0x250
    [<c022a884>] driver_register+0x9c/0x128
    [<c00086bc>] do_one_initcall+0x90/0x160
    [<c06d1904>] kernel_init+0xe8/0x1a4
    [<c000ee4c>] kernel_thread_exit+0x0/0x8
    [<ffffffff>] 0xffffffff

Change-Id: I3b29d71463af849a072cabbe56637adf6db6d0da
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>

Conflicts:
	include/linux/mmc/host.h

+ testing ...
mm: writeback: Tuning writeback daemon kicks in and flushes the dirty pages into disk

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Conflicts:
	mm/page-writeback.c

+ need testing ...

Conflicts:
	mm/page-writeback.c
lib/checksum.c: optimize do_csum a bit

Reduce the number of variables modified by the loop in do_csum() by 1,
which seems like a good idea.  On Nios II (a RISC CPU with 3-operand
instruction set) it reduces the loop from 7 to 6 instructions, including
the conditional branch.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>