[AArch64] Fix order of modes to lroundmn2 standard names.

gcc/
	* config/aarch64/aarch64-simd.md
	(l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Rename to...
	(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): ... This.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198397 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Map fcvt intrinsics to builtin name directly.

gcc/
	* config/aarch64/aarch64-builtins.c
	(aarch64_builtin_vectorized_function): Use new names for
	fcvt builtins.
	* config/aarch64/aarch64-simd-builtins.def (fcvtzs): Split as...
	(lbtruncv2sf, lbtruncv4sf, lbtruncv2df): ...This.
	(fcvtzu): Split as...
	(lbtruncuv2sf, lbtruncuv4sf, lbtruncuv2df): ...This.
	(fcvtas): Split as...
	(lroundv2sf, lroundv4sf, lroundv2df, lroundsf, lrounddf): ...This.
	(fcvtau): Split as...
	(lrounduv2sf, lrounduv4sf, lrounduv2df, lroundusf, lroundudf): ...This.
	(fcvtps): Split as...
	(lceilv2sf, lceilv4sf, lceilv2df): ...This.
	(fcvtpu): Split as...
	(lceiluv2sf, lceiluv4sf, lceiluv2df, lceilusf, lceiludf): ...This.
	(fcvtms): Split as...
	(lfloorv2sf, lfloorv4sf, lfloorv2df): ...This.
	(fcvtmu): Split as...
	(lflooruv2sf, lflooruv4sf, lflooruv2df, lfloorusf, lfloorudf): ...This.
	(lfrintnv2sf, lfrintnv4sf, lfrintnv2df, lfrintnsf, lfrintndf): New.
	(lfrintnuv2sf, lfrintnuv4sf, lfrintnuv2df): Likewise.
	(lfrintnusf, lfrintnudf): Likewise.
	* config/aarch64/aarch64-simd.md
	(l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Convert to
	define_insn.
	(aarch64_fcvt<frint_suffix><su><mode>): Remove.
	* config/aarch64/iterators.md (FCVT): Include UNSPEC_FRINTN.
	(fcvt_pattern): Likewise.




git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198398 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Add vector int to float conversions.

gcc/
	* config/aarch64/aarch64-builtins.c
	(aarch64_fold_builtin): Fold float conversions.
	* config/aarch64/aarch64-simd-builtins.def
	(floatv2si, floatv4si, floatv2di): New.
	(floatunsv2si, floatunsv4si, floatunsv2di): Likewise.
	* config/aarch64/aarch64-simd.md
	(<optab><fcvt_target><VDQF:mode>2): New, expands to float and floatuns.
	* config/aarch64/iterators.md (FLOATUORS): New.
	(optab): Add float, floatuns.
	(su_optab): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198399 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Implement vector float->double widening and double->float  narrowing.

gcc/
	* config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi_): New.
	(float_truncate_hi_): Likewise.
	(float_extend_lo_): Likewise.
	(float_truncate_lo_): Likewise.
	* config/aarch64/aarch64-simd.md (vec_unpacks_lo_v4sf): New.
	(aarch64_float_extend_lo_v2df): Likewise.
	(vec_unpacks_hi_v4sf): Likewise.
	(aarch64_float_truncate_lo_v2sf): Likewise.
	(aarch64_float_truncate_hi_v4sf): Likewise.
	(vec_pack_trunc_v2df): Likewise.
	(vec_pack_trunc_df): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198400 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/54349
	* config/i386/i386.h (enum ix86_tune_indices)
	<X86_TUNE_INTER_UNIT_MOVES_TO_VEC, X86_TUNE_INTER_UNIT_MOVES_FROM_VEC>:
	New, split from X86_TUNE_INTER_UNIT_MOVES.
	<X86_TUNE_INTER_UNIT_MOVES>: Remove.
	(TARGET_INTER_UNIT_MOVES_TO_VEC): New define.
	(TARGET_INTER_UNIT_MOVES_FROM_VEC): Ditto.
	(TARGET_INTER_UNIT_MOVES): Remove.
	* config/i386/i386.c (initial_ix86_tune_features): Update.
	Disable X86_TUNE_INTER_UNIT_MOVES_FROM_VEC for m_ATHLON_K8 only.
	(ix86_expand_convert_uns_didf_sse): Use
	TARGET_INTER_UNIT_MOVES_TO_VEC instead of TARGET_INTER_UNIT_MOVES.
	(ix86_expand_vector_init_one_nonzero): Ditto.
	(ix86_expand_vector_init_interleave): Ditto.
	(inline_secondary_memory_needed): Return true for moves from SSE class
	registers for !TARGET_INTER_UNIT_MOVES_FROM_VEC targets and for moves
	to SSE class registers for !TARGET_INTER_UNIT_MOVES_TO_VEC targets.
	* config/i386/constraints.md (Yi, Ym): Depend on
	TARGET_INTER_UNIT_MOVES_TO_VEC.
	(Yj, Yn): New constraints.
	* config/i386/i386.md (*movdi_internal): Change constraints of
	operand 1 from Yi to Yj and from Ym to Yn.
	(*movsi_internal): Ditto.
	(*movdf_internal): Ditto.
	(*movsf_internal): Ditto.
	(*float<SWI48x:mode><X87MODEF:mode>2_1): Use
	TARGET_INTER_UNIT_MOVES_TO_VEC instead of TARGET_INTER_UNIT_MOVES.
	(*float<SWI48x:mode><X87MODEF:mode>2_1 splitters): Ditto.
	(floatdi<X87MODEF:mode>2_i387_with_xmm): Ditto.
	(floatdi<X87MODEF:mode>2_i387_with_xmm splitters): Ditto.
	* config/i386/sse.md (movdi_to_sse): Ditto.
	(sse2_stored): Change constraint of operand 1 from Yi to Yj.
	Use TARGET_INTER_UNIT_MOVES_FROM_VEC instead of
	TARGET_INTER_UNIT_MOVES.
	(sse_storeq_rex64): Change constraint of operand 1 from Yi to Yj.
	(sse_storeq_rex64 splitter): Use TARGET_INTER_UNIT_MOVES_FROM_VEC
	instead of TARGET_INTER_UNIT_MOVES.
	* config/i386/mmx.md (*mov<mode>_internal): Change constraint of
	operand 1 from Yi to Yj and from Ym to Yn.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198401 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Vectorize over more math.h functions.

gcc/
	* config/aarch64/aarch64-builtins.c
	(aarch64_builtin_vectorized_function): Vectorize over ifloorf,
	iceilf, lround, iroundf.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198402 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patterns

gcc/
	* config/aarch64/aarch64-simd.md
	(<optab><VDQF:mode><fcvt_target>2): New, maps to fix, fixuns.
	(<fix_trunc_optab><VDQF:mode><fcvt_target>2): New, maps to
	fix_trunc, fixuns_trunc.
	(ftrunc<VDQF:mode>2): New.
	* config/aarch64/iterators.md (optab): Add fix, fixuns.
	(fix_trunc_optab): New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198403 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] fcvt instructions - arm_neon.h changes.

gcc/
	* config/aarch64/arm_neon.h
	(vcvt<sd>_f<32,64>_s<32,64>): Rewrite in C.
	(vcvt<q>_f<32,64>_s<32,64>): Rewrite using builtins.
	(vcvt_<high_>_f<32,64>_f<32,64>): Likewise.
	(vcvt<qsd>_<su><32,64>_f<32,64>): Likewise.
	(vcvta<qsd>_<su><32,64>_f<32,64>): Likewise.
	(vcvtm<qsd>_<su><32,64>_f<32,64>): Likewise.
	(vcvtn<qsd>_<su><32,64>_f<32,64>): Likewise.
	(vcvtp<qsd>_<su><32,64>_f<32,64>): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/vect-vcvt.c: New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198404 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64][Testsuite] Enable vect_uintfloat_cvt for AArch64.

gcc/testsuite/
	* lib/target-supports.exp (vect_uintfloat_cvt): Enable for AArch64.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198406 138bc75d-0d04-0410-961f-82ee72b054a4
Update tail-merge header comment.

2013-04-29  Tom de Vries  <tom@codesourcery.com>

	* tree-ssa-tail-merge.c: Update header comment.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198407 138bc75d-0d04-0410-961f-82ee72b054a4
2013-04-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* predict.c: Fix typo in comment above #define PROB_VERY_UNLIKELY.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198408 138bc75d-0d04-0410-961f-82ee72b054a4
2013-04-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/57089
	* omp-low.c (expand_omp_taskreg): If the parent function had
	a broken loop tree make sure to schedule a fixup for the child
	as well.
	(expand_omp_for_generic): Properly add loops.
	(expand_omp_for_static_nochunk): Likewise.
	(expand_omp_for_static_chunk): Likewise.
	(expand_omp_for): For the degenerate case fixup loops.
	(expand_omp_sections): Fix default bb placement in loops.
	(expand_omp_atomic_pipeline): Properly add loops.

	* gfortran.dg/gomp/pr57089.f90: New testcase.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198409 138bc75d-0d04-0410-961f-82ee72b054a4