ARM: allow printing of ARM atomic DAG nodes.

We'd forgotten to provide string representations for the special ARMISD atomic
nodes; this adds them in. No effect on CodeGen, just makes the output of
"-view-whatever-dags" slightly more readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186406 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Fix printing of inline asm operands.

Previously an asm operand with no operand modifier would give the error
"invalid operand in inline asm".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186407 91177308-0d34-0410-b5e6-96231b3b80d8

[APFloat] PR16573: Avoid losing mantissa bits in ppc_fp128 to double truncation

When truncating to a format with fewer mantissa bits, APFloat::convert
will perform a right shift of the mantissa by the difference of the
precision of the two formats.  Usually, this will result in just the
mantissa bits needed for the target format.

One special situation is if the input number is denormal.  In this case,
the right shift may discard significant bits.  This is usually not a
problem, since truncating a denormal usually results in zero (underflow)
after normalization anyway, since the result format's exponent range is
usually smaller than the target format's.

However, there is one case where the latter property does not hold:
when truncating from ppc_fp128 to double.  In particular, truncating
a ppc_fp128 whose first double of the pair is denormal should result
in just that first double, not zero.  The current code however
performs an excessive right shift, resulting in lost result bits.
This is then caught in the APFloat::normalize call performed by
APFloat::convert and causes an assertion failure.

This patch checks for the scenario of truncating a denormal, and
attempts to (possibly partially) replace the initial mantissa
right shift by decrementing the exponent, if doing so will still
result in a valid *target format* exponent.


Index: test/CodeGen/PowerPC/pr16573.ll
===================================================================
--- test/CodeGen/PowerPC/pr16573.ll	(revision 0)
+++ test/CodeGen/PowerPC/pr16573.ll	(revision 0)
@@ -0,0 +1,11 @@
+; RUN: llc < %s | FileCheck %s
+
+target triple = "powerpc64-unknown-linux-gnu"
+
+define double @test() {
+  %1 = fptrunc ppc_fp128 0xM818F2887B9295809800000000032D000 to double
+  ret double %1
+}
+
+; CHECK: .quad -9111018957755033591
+
Index: lib/Support/APFloat.cpp
===================================================================
--- lib/Support/APFloat.cpp	(revision 185817)
+++ lib/Support/APFloat.cpp	(working copy)
@@ -1956,6 +1956,23 @@
     X86SpecialNan = true;
   }
 
+  // If this is a truncation of a denormal number, and the target semantics
+  // has larger exponent range than the source semantics (this can happen
+  // when truncating from PowerPC double-double to double format), the
+  // right shift could lose result mantissa bits.  Adjust exponent instead
+  // of performing excessive shift.
+  if (shift < 0 && isFiniteNonZero()) {
+    int exponentChange = significandMSB() + 1 - fromSemantics.precision;
+    if (exponent + exponentChange < toSemantics.minExponent)
+      exponentChange = toSemantics.minExponent - exponent;
+    if (exponentChange < shift)
+      exponentChange = shift;
+    if (exponentChange < 0) {
+      shift -= exponentChange;
+      exponent += exponentChange;
+    }
+  }
+
   // If this is a truncation, perform the shift before we narrow the storage.
   if (shift < 0 && (isFiniteNonZero() || category==fcNaN))
     lostFraction = shiftRight(significandParts(), oldPartCount, -shift);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186409 91177308-0d34-0410-b5e6-96231b3b80d8
[Support] Fix some warnings when self-hosting clang on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186413 91177308-0d34-0410-b5e6-96231b3b80d8
Create files with mode 666. This matches the behavior of other unix tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186414 91177308-0d34-0410-b5e6-96231b3b80d8
SLPVectorizer: Reduce the compile time of the consecutive store lookup.

Process groups of stores in chunks of 16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186420 91177308-0d34-0410-b5e6-96231b3b80d8
On error, close the temporary file descriptor.

With this change llvm-ar can remove the temporary file on windows too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186423 91177308-0d34-0410-b5e6-96231b3b80d8
When the inliner merges allocas, it must keep the larger alignment

For safety, the inliner cannot decrease the allignment on an alloca when
merging it with another.

I've included two variants of the test case for this: one with DataLayout
available, and one without. When DataLayout is not available, if only one of
the allocas uses the default alignment (getAlignment() == 0), then they cannot
be safely merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186425 91177308-0d34-0410-b5e6-96231b3b80d8
[Support] Add a Unicode conversion wrapper from UTF16 to UTF8

This is to support parsing UTF16 response files in LLVM/lib/Option for
lld and clang.

Reviewers: hans

Differential Revision: http://llvm-reviews.chandlerc.com/D1138

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186426 91177308-0d34-0410-b5e6-96231b3b80d8
Test commit to verify write access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186429 91177308-0d34-0410-b5e6-96231b3b80d8
Make SpecialCaseList match full strings, as documented, using anchors.

Differential Revision: http://llvm-reviews.chandlerc.com/D1149

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186431 91177308-0d34-0410-b5e6-96231b3b80d8