mmc: msm_sdcc: Fix SDCC-BAM, DML reset sequence

Resetting SDCC-BAM after reset of SDCC-DML causes
interface disconnect between SDCC-BAM and SDCC-DML
and lead to hang when SDCC driver initiates data
transfer in BAM mode. Modify the SDCC reset sequence
to reset SDCC-DML after reset of SDCC-BAM.

CRs-Fixed: 423399
Change-Id: Ia31d40e30cbf95befba3b1133a525a81903789f2
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
(cherry picked from commit b745eeb229a476d81ee4177adfe168d3a35bda47)
msm: spm: Add msm_spm_get_vdd API

Add msm_spm_get_vdd() API to return the core active voltage

Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit 4133ba1e1c9384910cd6db56130b654af115651d)

Change-Id: I76bcfbcb0eefda09757e9db86ba4adb76a44f2f7
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: pm-8x60: save and restore CP15 registers

To prevent the Krait core configuration from being indvertently changed
when doing L2 power collapse, save a few CP15 registers and restore them
back after coming out of power collapse. This needs to be done after
switching the Krait from active freq to QSB clock source.

Before doing power collapse, the core0 clock switches over to QSB. However,
QSB can run at any frequency and the voltage required for that
frequency, needs to be ensured when coming out power collapse. If the
QSB clock at resume, is a higher frequency at than the QSB clock was at
collapse, then we may run the risk of running at higher clock with a
lower voltage.

Hence, switch to 1.0 V (safe vdd) when going into PC (after switching to
QSB clock source) and the SPM would resume at 1.0V. After the core
starts running, restore the CP15 registers and switch to the previously
saved active voltage, before switching clocks to the active frequency.

This is applicable only for APQ8064.

Change-Id: I75a70f5e07bd581fc8028bed79de7ee796f4c411
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/pm-8x60.c
msm: pm-8x60: Fix bug where device enter low power mode

An incorrect ordering in the check of allowed modes, results in
standalone power collapse not getting selected when the secondary
cores are online.

Change-Id: Idc7177b78bd0ce7563cc27afbf6c12d3bc1f9f9a
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: boards: Enable Krait Retention.

Add SPM sequences to do Krait retention for 8960,8930
and 8064. Also added a new rpmrs level containing the
latencies and power measurements for this new low power
state.
CRs-Fixed: 369864

Change-Id: I321fa22ab891b929366444f6187876c57f87c421
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Mako:
Signed-off-by: Andrew Sutherland <dr3wsuth3rland@gmail.com>

Conflicts:
	arch/arm/mach-msm/board-8960.c
defconfig: msm8960: Disable USB Storage debug config

when USB_STORAGE_DEBUG config is enabled, all scsi commands sent to
USB storage devices are printed onto console.  As serial console
is enabled, this is degrading throughput.  This debug feature is
useful only during debugging issues.  Hence disable this feature
by default.

(cherry picked from commit 4713b9d5ded96679e68efdaebe9e8eb0e77b0e6f)
CRs-Fixed: 421411

Change-Id: I0e7e5546af84bbe7a0172fb177d1d3607f858e24
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Mako:
Signed-off-by: Andrew Sutherland <dr3wsuth3rland@gmail.com>
msm: event_timer: Support to add event timers.

Add support to allow drivers to specify future events
that need to be treated as hard deadlines. Upon event timer
expiry the driver will be notified by callback function
that the driver provides.
The pm code can query the earliest event and modify
the event timer accounting for the back off based on the
latency of the low power mode being entered.

(cherry picked from commit 388c308cebef8e9cdbd80608a032abc810d46e62)
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>

Change-Id: I461e2c31c285b93588aa56dd25905efab020e0c8
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: event_timer: Fix potential race condition

There is a possible race condition which could happen in the following
scenario:

Core 0 PC: lock_hrtimer_base

 lock_hrtimer_base
 hrtimer_get_remaining
 get_next_event_time
 msm_pm_idle_prepare
 msm_cpuidle_enter

Core 1 PC: generic_exec_single

 generic_exec_single
 smp_call_function_single
 setup_event_timer
 mdp_update_pm

If core0 idle thread runs before core1 has had the chance to make the
smp_call_function_single, then idle thread could end up spinning on
lock_hrtimer_base() since setup_event_timer adds an event to the event
queue but the smp cross call is the one that initializes the event timer.
So Core0 could spin on lock_hrtimer_base() since CPU1's SMP call won't be
handled as idle thread runs in noirq context.

To prevent this scenario make a change to the code flow to do the queue
operations and the timer operations on the same CPU. Meaning
setup_event_timer will only make an SMP cross call to re-organize the event
queue and reset the event timer all of which will be run on CPU0.

CRs-fixed: 425587
Change-Id: I53fc551d18f350c47e05a94976b56a5fd2e9050b
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
(cherry picked from commit e73869cb18ee79bd0b951fd7effd6565ce7ccfb4)
msm: defconfig: Enable event timer

Enable Event timer feature. This feature enables PM
code to monitor events that require the core to be ready
to handle the event.

(cherry picked from commit 19d00d50f5b09a25712133ed0b329cc9c5c3d1d8)
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>

Change-Id: Ib56e49edd00bea35ab7395bb038a627f43187f57
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Mako:
Signed-off-by: Andrew Sutherland <dr3wsuth3rland@gmail.com>
msm_fb: display: wake up system around vsync

To avoid frame drops due to power collapse,
wake up cpu right before vsync.

Conflicts:

	drivers/video/msm/mdp.c
	drivers/video/msm/msm_fb.h

Change-Id: I63385eb329ae5e74cbac5256823fd3a213e0a0e1
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: wake up system before vsync for cmd panel

Add this feature for cmd mode panel. The feature is to avoid frame
drops due to power collapse and it is already present for other
display interfaces.

Change-Id: Ic68f41cd59931294b592577475ed7480459f2cf8
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: change the location of wakeup timer call

There are two pathes (pan display and overlay commit) to commit
display buffer, so change the location of cpu timer wakup call to the
common pipe_commit function to make sure cpu get waked up around
vsync.

Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Change-Id: Idbe6049d740a7e17a6a90e28566f7a9c74e348f2
msm: display: sync point clean up

Remove unused fence input in mdp_display_commit
structure
Use different timeline name for different fb

Change-Id: I4edd335b36dce057ff3e54302af6088a9cc470ec
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
msm_fb: display: fix iommu leak during base layer swap

Retain RGB1 iommu information during  base layer swap
so that iommu used by RGB1 can be freed back to pool later.

Change-Id: Ibed85179284743dc8a9d1434f0c81626b0567e16
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
(cherry picked from commit be46f9f596c5172438a74759d48ca7db600cd737)
msm:wfd: Unregister switchdev before freeing memory

Change-Id: I42fa43e3991a6e1d4ead7d286c095831847a2e03
Signed-off-by: Shalaj Jain <shalajj@codeaurora.org>
msm_fb: display: Evenly balancing load on MDP ports

Moving RGB1 and RGB2 to AXI port 1. This fixes underrun issues seen
on External display while connecting and disconnecting HDMI. This patch
evenly balancing pipe loads on each port.

Change-Id: I2dc1166d04bb938f9e233a6de52f1a8a3fdd29e2
CRs-Fixed: 435458
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm: display: correct copyright statement

msm_mdp.h has been changed from 2012

Change-Id: I350dbeb5ba703f532b9858326f8a2d65d160b92c
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Revert "msm: display: correct copyright statement"

This reverts commit 5d14bd1aa6b2587439bde0b0470ecc2a7fd5ca9b.
Revert "msm: display: sync point clean up"

This reverts commit c4e54a1f0cb478f40aabf4e44ddcec8ff2eb4105.
power: pm8921-charger: report DC online for some platforms.

Some hardware platforms can supply VPH_PWR without battery
or charger being present.

To avoid shutting down due to no connected power sources
from the perspective of software set a flag that forces
the DC supply to be online for this type of platform.

Signed-off-by: David Keitel <dkeitel@codeaurora.org>
(cherry picked from commit a3cf943ef8c91435e2cb94b8e8bcc482dc65cb27)

Conflicts:

	drivers/power/pm8921-charger.c

Change-Id: I565edb1ab797384481ce5e37aee73ee0a8e80428
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>