[ARM] Treat VMRS & VMSR instructions as MRC & MCR instructions

The VMRS & VMSR instruction are nothing but MRC & MCR instructions
on CP10:
VMRS <Rt>, <fpreg>  ==>  mrc p10, 7, <Rt>, <fpreg>, c0, 0
VMSR <fpreg>, <Rt>  ==>  mcr p10, 7, <Rt>, <fpreg>, c0, 0

This patch updates arm_instgrp_coproc() of common ARM instruction
emulation library as-per above.

Signed-off-by: Anup Patel <anup@brainfault.org>