FMCOMMS1: ADF4351: Fix reserved bit register usage

ADF4351 register 5 has two reserved bits (19/20) these must be set to 1
otherwise this may result in unwanted behavior.
FMCOMMS1: ADF4351: Fix prescaler usage.

The ADF4350/1 features a programmable dual-modulus prescaler of 4/5 or
8/9.
When set to 4/5, the maximum RF frequency allowed is 3 GHz.
Therefore, when operating the ADF4351 above 3 GHz, this must be set to
8/9.
In this context not the RF output frequency is meant - it's the VCO
frequency.

Therefore move the prescaler selection after we derived the VCO
frequency from the desired RF output frequency.

This BUG may have caused PLL lock instabilities when operating the VCO
at the very high range close to 4.4 GHz.