[ARM] arm64: Add register read/write functions for HW-assisted emulation

All AArch32 GPRs (including banked regs) are mapped to one of the
31 GPRs of AArch64 state.

When we trap to EL2 mode for emulating instructions for ARM32 guest
we get the excat AArch64 GPRs which needs to be updated from ISS field
of ESR_EL2 register hence we don't need to find out AArch64 GPRs based
on current AArch32 mode of ARM32 guest.

This means software emulation of instructions and HW-assisted emulation
of instructions would require separate VCPU register read/write functions.

This patch adds cpu_vcpu_reg64_read() and cpu_vcpu_reg64_write() for
HW-assisted instruction emulation in arm64.

Signed-off-by: Anup Patel <anup@brainfault.org>