Revert "alx: fix tx-timeout and WoL wrong speed setting"

Xiong is sending out other patches that split this one
into other smaller patches.

This reverts commit fcbfd447c62159501fb817eac6cd99ea8577975f.
alx: fix wrong speed setting for WoL

WoL speed is wrongly set to 100M, revise it to 10M as 1st priority for
powersaving.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: add version info

version format : MAJ.MIN.PATCH

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: fix tx-timeout after sleep/resume

tx-timeout after sleep/resume is caused by wrong interrupt mode used
after resume.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: add stats/self-test for ethtool

basic function of hw-stats and self-test is added.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: remove the 'running' condition to change MTU

MTU ought to be set whether the interface is 'Up' or 'Down'.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: add self test for interrupt

MSIX, MSI, and INTx interrupt modes are tested, if the platform support.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: add loopback test

loopback (both MAC and PHY) test is added for self-test.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: support version C0 FPGA

current C0 FPGA platform is ready, this patch adds new register difinition
for C0.
To run this driver on FPGA, just revised hw->is_fpga to 'true' in init_sw

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: reduce num txq to 1 if MSIX disabled

ONLY 1 napi is allocated for MSI & INTx mode interrupt, so,
only 1 txq/rxq is supported.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: reduce RSS indirection table size to 128

256 table size will casue wrong CPU/Q number in RRD description.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: show correct DUPLEX info for ethtool

because FULL_DUPLEX & DUPLEX_FULL are different, 'ethtool ethX' will show
wrong duplex info, this patch fix it.
the PHY initial advertisement is also changed to reflect real HW capability.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>
alx: improve self-test for FPGA

define new registers value for C0 version for register checking test,
and untouch PHY setting when do MAC loopback test.
PS. PHY external loopback isn't supported for FPGA due to board
limitation.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>