tcg-ppc64: Implement compound logicals

Mostly copied from the ppc32 port.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Improve OR and XOR with constant

The OR pattern was attempting to split the constant into two, but
would sometimes emit an extra ORIS.  The XOR pattern would just
fall back to loading the entire constant, but had a typo in the
selection of constant width to load.

The changes to AND are cosmetic, arranging the source to match
improvements to the other two logical operations.

Signed-off-by: Richard Henderson <rth@twiddle.net>
fixup bswap
tcg-ppc64: Implement deposit

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Rename the Z constraint to U

We're about to add a constraint that equals 0, and Z is a
much more correct sounding letter for that.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement Z constraint

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement I constraint

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement add2 and sub2

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use SUBFIC in sub_i32 and sub_i64

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use I constraint for mul

The mul_i32 pattern was loading non-16-bit constants into a register,
when we can get the middle-end to do that for us.  The mul_i64 pattern
was not considering that MULLI takes 64-bit inputs.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement mulu2_i64 and muls2_i64

Signed-off-by: Richard Henderson <rth@twiddle.net>
fixup a[0-2] type
fixup subi_32
disas: Disassemble all ppc insns for the host

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Cleanup tcg_out_movi

The test for using movi32 was sub-optimal for TCG_TYPE_I32, comparing
a signed 32-bit quantity against an unsigned 32-bit quantity.

Assuming arithmetic insns pipeline better than shift insns, emit large
unsigned 32-bit values with addi+oris+ori instead of addis+ori+rldicl.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use TCGType throughout compares

The optimization/bug being fixed is that tcg_out_cmp was not applying the
right type to loading a constant, in the case it can't be implemented
directly.  Rather than recomputing the TCGType enum from the arch64 bool,
pass around the original TCGType throughout.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Rewrite setcond

Never use MFCR, as the latency is really high.  Even MFOCRF, at half
the latency of MFCR, isn't as fast as we can do with carry tricks.

The ADDIC+SUBFE trick only works for word-sized operands, as we need
carry-out from bit 63.  So for ppc64 we must extend 32-bit inputs.

Use ISEL if available.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement movcond

Signed-off-by: Richard Henderson <rth@twiddle.net>