intel: Conditionally compile mcs-related code for i965 only.

This patch ifdefs out intel_mipmap_tree::mcs_mt when building the i915
(pre-Gen4) driver (MCS buffers aren't supported until Gen7, so there
is no need for this field in the i915 driver).  This should make it a
bit easier to implement fast color clears without undue risk to i915.
intel: Create intel_miptree_get_region() to prepare for fast color clear.

With the advent of fast color clears, it will no longer be safe for
the driver to access the data stored in a miptree with impunity.  For
example, sometimes a resolve will need to be performed first (to
ensure that deferred writes due to a fast clear are performed before
the buffer is accessed).  Other times, fast clear will need to be
disabled for the miptree, so that its contents can be safely shared
with an entity that Mesa can't synchronize with easily.

To prepare for that, this patch renames intel_mipmap_tree::region to
intel_mipmap_tree::region_private, creates an accessor function,
intel_miptree_get_region().  At the moment, the accessor function
simply returns region_private.  Later in the patch series, this
function will be expanded to take appropriate actions to maintain the
proper fast color clear state.

As much as possible, I've tried to restrict the functions which
directly access region_private to low-level miptree functions
(e.g. miptree initialization functions), so that it will be easy to
verify that those functions access the miptree contents safely.
!UPSTREAM: i965/gen7+: Create an enum for keeping track of fast color clear state.

This patch includes code to update the fast color clear state
appropriately when rendering occurs.  The state will also need to be
updated when a fast clear or a resolve operation is performed; those
state updates will be added when the fast clear and resolve operations
are added.

TODO:

- Move de-constification to previous patch.
i965/gen7+: Set up MCS in SURFACE_STATE whenever MCS is present.

On Gen7+, MCS buffers are used both for compressed multisampled color
buffers and for "fast clear" of single-sampled color buffers.

Previous to this patch series, we didn't support fast clear, so we
only used MCS with multisampled bolor buffers.

As a first step to implementing fast clears, this patch modifies the
code that sets up SURFACE_STATE so that it configures the MCS buffer
whenever it is present, regardless of whether we are multisampling or
not.
i965/gen7+: Create helper functions for single-sample MCS buffers.
i965/gen7+: Implement fast color clear operation

Add field intel_mipmap_tree::fast_clear_color_value, which holds the most
recent fast color clear value, if any. Use it to set the SURFACE_STATE's
clear color for render targets.

The fast color clear operation is implemented in blorp.

[chadv] Write commit message.
i965/blorp: Expand clear class hierarchy to prepare for RT resolves.

The fragment shaders that to do color clears will be re-used to
perform so-called "render target resolves" (the resolves associated
with fast color clears).  To prepare for that, this patch expands the
class hierarchy for blorp params: brw_blorp_clear_params (which will
be used for both fast and slow color clears) derives from
brw_blorp_const_color_params (which will be used for all blorp
operations where the fragment shader outputs a constant color).

Some other data structures and functions were also renamed to use
"const_color" nomenclature where appropriate.
i965/blorp: Write blorp code to do render target resolves.

This patch implements the "render target resolve" blorp operation.
This will be needed when a buffer that has experienced a fast color
clear is later used for a purpose other than as a render target
(texturing, glReadPixels, or swapped to the screen).  It resolves any
remaining deferred clear operation that was not taken care of during
normal rendering.

Fortunately not much work is necessary; all we need to do is scale
down the size of the rectangle primitive being emitted, run the
fragment shader with the "Render Target Resolve Enable" bit set, and
ensure that the fragment shader writes to the render target using the
"replicated color" message.  We already have a fragment shader that
does that (the shader that we use for fast color clears), so for
simplicity we re-use it.
i965/gen7+: Ensure that front/back buffers are fast-clear resolved.

We already had code in intel_downsample_for_dri2_flush() for
downsampling front and back buffers when multisampling was in use.
This patch extends that function to perform fast color clear resolves
when necessary.

To account for the additional functionality, the function is renamed
to simply intel_resolve_for_dri2_flush().
!UPSTREAM: ifdef out contents of intel_resolve_for_dri2_flush for pre-gen6

TODO:
- Move earlier in patch series.
i965/gen7+: Resolve color buffers when necessary

Resolve color buffers that have been fast-color cleared:
    1. before texturing from the buffer
    2. before using the buffer as the source in a blorp blit
    3. before mapping the buffer's miptree
    4. before accessing the buffer using the hardware blitter

Cases 1 and 2 happen in the functions brw_predraw_resolve_buffers()
and brw_blorp_blit_miptrees(), respectively.  Cases 3 and 4 are
handled by the intel_miptree_get_region() function.

In order to make sure that intel_miptree_get_region() doesn't try to
resolve a buffer during emission of state commands, this patch also
adds a new boolean, brw->state_emission_in_progress, which is set to
true during brw_upload_state() and brw_blorp_exec().
i965/gen7+: Allocate MCS buffers for use by fast color clears.

v2: [chadv]
    - Remove allocation in intel_miptree_create_for_teximage. Replace with
      deferred allocation in intel_renderbuffer_update_wrapper, at same
      site as deferred hiz allocation.