ENGR00285446-1 [MX28] SAIF: Bit Shift in SAIF RX Data

Based on RTL simulation, control register modification after
setting RUN bit will cause bit shift issue. Soft Reset is needed
on both SAIF before modifying the SAIF control register.

Signed-off-by: Jack Lee <jack.lee@freescale.com>
ENGR00285446-2 [MX28] SAIF: Bit Shift in SAIF RX Data

When SAIF is in functional operation, BYPASS_SAIF should be 0.
Currently, SAIF.1 is not explicitly configured. As a result, SAIF.0
and SAIF.1 are using two different clock sources. ( ref_pll and ref_xtal )
Based on the experiment of different clock settings, we can identify
bit shift error in some configurations. The common factor of these
configurations are in different clock source.
Thus, during clock tree setup, SAIF.1 should be created to have the same
settings of SAIF.0. When both SAIF are using ref_pll clock source,
bit shift issue will not happen.

Signed-off-by: Jack Lee <jack.lee@freescale.com>
ENGR00285446-3 [MX28] SAIF: Bit Shift in SAIF RX Data

The total changes are divided into two parts: ENGR00285446-2
 and ENGR00285446-3. The first part contains platform specified code
while the second part contains driver specified code.

When SAIF is in functional operation, BYPASS_SAIF should be 0.
Currently, SAIF.1 is not explicitly configured. As a result, SAIF.0
and SAIF.1 are using two different clock sources. ( ref_pll and ref_xtal )
Based on the experiment of different clock settings, we can identify
bit shift error in some configurations. The common factor of these
configurations are in different clock source.
Thus, during clock tree setup, SAIF.1 should be created to have the same
settings of SAIF.0. When both SAIF are using ref_pll clock source,
bit shift issue will not happen.

Signed-off-by: Jack Lee <jack.lee@freescale.com>
ENGR00285448 [MX28] SAIF: Out of Voltage in SAIF clock PINs

The 12mA drive strength in SAIF clock PINs is too high according
to the requirement of SGTL5000 codec. You will see overshoot in
rising edge of SAIF clocks. Change the drive strength to
4mA based on the SGTL5000 specification. Also, pull resistors in
these PINs are not necessary.

Signed-off-by: Jack Lee <jack.lee@freescale.com>