[mips][msa] CHECK-DAG-ize MSA 2r.ll test.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194386 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] CHECK-DAG-ize MSA 2rf.ll test.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194387 91177308-0d34-0410-b5e6-96231b3b80d8
Move debug message in vectorizer

No functional change, just better reporting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194388 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] CHECK-DAG-ize MSA 2rf_float_int.ll test.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194389 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] CHECK-DAG-ize MSA 2rf_int_float.ll test.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194390 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] CHECK-DAG-ize MSA 3r-a.ll test.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194391 91177308-0d34-0410-b5e6-96231b3b80d8
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too

Reviewers: dsanders

Reviewed By: dsanders

CC: llvm-commits, nadav

Differential Revision: http://llvm-reviews.chandlerc.com/D1958

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
Just pass the DIComposite type by value instead of by pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194398 91177308-0d34-0410-b5e6-96231b3b80d8
80-col.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194399 91177308-0d34-0410-b5e6-96231b3b80d8
Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194400 91177308-0d34-0410-b5e6-96231b3b80d8
Unify the adding of enumerators with the construction of the enumeration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194401 91177308-0d34-0410-b5e6-96231b3b80d8
CalcSpillWeights: give a better describing name to calculateSpillWeights

Besides, this relates it more obviously to the VirtRegAuxInfo::calculateSpillWeightAndHint.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194404 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] The shift right/left and insert immediate builtins expect 3
source operands, a vector, an element to insert, and a shift amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194406 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Fix logic error in loading vector parameters of more than 4 components

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194409 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194410 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing a problem with iterator validity in RuntimeDyldImpl::resolveExternalSymbols

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194415 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM] Add support for MVFR2 which is new in ARMv8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194416 91177308-0d34-0410-b5e6-96231b3b80d8
CalcSpillWeights: allow overidding the spill weight normalizing function

This will enable the PBQP register allocator to provide its own normalizing function.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194417 91177308-0d34-0410-b5e6-96231b3b80d8
Change libLTO back to linking with @executable_path instead of @rpath.

This partially reverts r187641 until ld64 adopts a change to link with an
rpath setting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194418 91177308-0d34-0410-b5e6-96231b3b80d8