ARM: Fix incorrect pack pattern for thumb2

Propagate the fix from r185712 to Thumb2 codegen as well. Original
commit message applies here as well:

A "pkhtb x, x, y asr #num" uses the lower 16 bits of "y asr #num" and
packs them in the bottom half of "x". An arithmetic and logic shift are
only equivalent in this context if the shift amount is 16. We would be
shifting in ones into the bottom 16bits instead of zeros if "y" is
negative.

rdar://14338767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185982 91177308-0d34-0410-b5e6-96231b3b80d8
Fix comment.

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Correct comment.


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Document a known limitation of the status quo.

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Un-break the buildbot by tweaking the indirection flag.
Pulled in a testcase from the debuginfo-test suite.

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Explicitly define ARMISelLowering::isFMAFasterThanFMulAndFAdd. No functionality change.

Currently ARM is the only backend that supports FMA instructions (for at least some subtargets) but does not implement this virtual, so FMAs are never generated except from explicit fma intrinsic calls. Apparently this is due to the fact that it supports both fused (one rounding step) and unfused (two rounding step) multiply + add instructions. This patch clarifies that this the case without changing behavior by implementing the virtual function to simply return false, as the default TargetLoweringBase version does.

It is possible that some cpus perform the fused version faster than the unfused version and vice-versa, so the function implementation should be revisited if hard data is found.


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Fix typo


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Add support for Mips break and syscall insructions. The corresponding test cases are added.

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Reverting commit r185999 due to buildboot failure.

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Reverting commit r185999 due to buildboot failure.

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PPC: Add a better comment about the i64 FI fixup

In discussing this change with Bill Schmidt, it was decided that the original
comment about negative FIs was incorrect. We'll still exclude them for now, but
now with a more-accurate explanation.

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Remove llvm/ADT/NullablePtr.h, there are no uses of it in-tree.

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R600/SI: Add intrinsics for texture sampling with user derivatives

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

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R600/SI: Initial support for LDS/GDS instructions

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186009 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add intrinsic for retrieving the current thread ID

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

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R600/SI: Add pattern for the AMDGPU.barrier.local intrinsic

lit test coverage to follow in the next commit.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

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R600/SI: Initial local memory support

Enough for the radeonsi driver to use it for calculating derivatives.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

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Simplify code.

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Safeguard DBG_VALUE handling. Unbreaks the ASAN buildbot.

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Use the appropriate unsigned int type for the offset.

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