msm_fb: display: fix the hang issue caused by solidfill pipe

When mdp pipe solidfill mode is disabled, the staled pipe info is used
to update mdp pipe regs. This caused mdp hang. Since
mdp4_overlay_rgb_setup function already resets solidfill mode, this
patch removes any pipe register updates that are related to disabling
solidfill mode.

CRs-fixed: 467555
Change-Id: I23f4b29731c9097ab0cc38baa00cd35bc536d2ba
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: display: Fix composition issues when framework rebooted in suspend.

Currently, if framework is rebooted while in suspend mode, borderfill
is not unset due to which MDP composition can not be enabled. This patch
fixes the issue.

Change-Id: I8b671eccedebf2bb08724cf2d284d4ab27a71360
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
msm_fb: display: fix the suspend/resume hang caused by wait4vsync stuck

wait_for_completion in wait4vsync stucks after multiple suspend/resume
tests. The cause is that when show_event timeout happens, or vsync isr
is disabled for long time, wait_vsync_cnt resets to zero, and in vsync
isr complete_all has no chance to be called which caused mdp hang. So
complete_all needs to be called whenever show_event has timeouts.

Change-Id: I124899ff95fd5550d2759d215f16fa9cb8c0c211
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: wait4vsync before set suspend flag

Since wait4vsync checks suspend flag, wait4vsync needs to
be executed before suspend flag set to enforce wait happen.
Also, when timing generator is turned off, wait4vsync can
not be used anymore since the last vsync may have passed
before wait4vsync called. This patch fixed commit_comp
timeout cause fence timeout happen on hdmi plug and unplug
cases.

CRs-fixed: 449027
Change-Id: I0f5520538bb290643a648c937296b6bc097fe051
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Program source address registers correctly

Scale filter FIR uses the adjacent pixels as part of the
processing. Source address registers should be program such that
they point to the first valid pixel so that non-ROI pixels are
ignored. This is done by making source x,y offsets to zero and
adding the computed offset to source address.

CRs-Fixed: 380020
Change-Id: I998fdd46f39dc67f32c422ec209da59d1add2e95
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm: display: fix iommu page faults for devices with lcdc panel.

Fetch was happening from non-iommu buffer because of wrong mixer
configuration for lcdc panels.

Change-Id: Ie313ce71ff269108271437f758c0dc37884a240c
Signed-off-by: Sangani Suryanarayana Raju <csuryan@codeaurora.org>
msm: display: reset vsync state when display is turned on

In the case that vsync ctrl is unbalanced, vsync IRQ is cleared
in suspend,  vsync cannot be enabled after resume.
Clear the status when display is turned on

CRs-fixed: 449155
Change-Id: I5ecf23053b60d1fbd91f042758d67d39c83ab444
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
msm_fb: display: calculate mdp clock including borderfill pipe

For hdmi case, mdp clock calculation needs including borderfill
pipe to prevent dtv underrun while system is in suspend.

Crs-fixed: 449027
Change-Id: I98789343317d5cfdf1f56e496cecb4dd663c907f
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: add mutex to video_off

It is possible  that pipe_commit still be issued by
frame work after suspend had been started. Therefore
mutex lock within video_off is necessary to prevent
race condition from happening between these two threads.

Change-Id: I57f51744c1654d6def8664c492035631a5b7081e
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Do clock control within mdp4_hw_init

Since mdp4_hw_init() access mdp registers, mdp clock control
within mdp4_hw_init() is necessary.

CRs-fixed: 455506
Change-Id: I768f468314fc920029b4c88e49ef6a74f6b74f58
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: Update MDP fence wait behaviour

The current fence wait times out too early in cases where the GPU
is under a heavy workload. Change this behaviour to warn and wait
for a longer time for GPU to complete it's work.

Change-Id: I8b20c22733a77c1aaea4a1fd1e4daaa14b5ec2fd
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm_fb: display: balance secure map and unmap in each mfd

Make sure secure map and unmap get called in each mfd and balanced.
Otherwise, secure contents can not be played for both primary and
hdmi.

CRs-fixed: 450427
Change-Id: I5399be64fbb104dc3cbe2c5c65b3f4406f47473c
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: Wait for DMAE for external interface (DTV)

When calling FBIOPAN_DISPLAY for external, there is no wait
which results in irregular fps when tested with fbtest.
Enable DMAE wait to wait until DMAE is over thereby fixing
irregular fps shown in fbtest results.

Crs-fixed: 438078
Change-Id: Iff528ccc17a1e4078c8825b35d4778a7d9e40e7f
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: add mfd null pointer and mfd panel_power_on checks

These checks are necessary for the situations where display is off but
vsync ctrl enable or disable is still called.

CRs-Fixed: 462586
Change-Id: I2ee43ff323da38359f3bff28669df19b87d8343d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: reset base layer database

Reset base layer database at suspend so that new base layer can
be populated properly at next resume.

CRs-fixed: 462289
Change-Id: Iddffa15ab8d6ca024b37674fbbb412d23d27b59d
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: Fix adb shell start/stop issue when bypass enabled

Currently when 2/3/4 layer bypass is enabled, doing a adb shell
stop/start is failing overlay and composition happens through
GPU. Fix this issue by proper overlay configuration during this
scenario.

Change-Id: Ia04f1839bf80ed552671e48445af63a4dcd6bdfd
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm: display: vsync usage in turning off dsi video

Add timeout to waiting for vsync so that it can come out
when vsync interrupt is not working.
Need not wait for vsync after timing engine is off.

CRs-Fixed: 458419

Change-Id: Ib989e435405613d891024ba15144723730454e34
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
msm_fb: display: prepare clocks before enable AHB clock

Clocks need to be prepared before enabled and unprepared after
clock disabled.

CRs-fixed: 466843
Change-Id: I5180c98a2c5fd4bd867272ee1d2bf274ff15d215
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
mms_fb: display: init pipe default configure as solidfill

Initialize mdp pipes default config as solid fill so that
there will have no memory fetch if pipe are staged into
mixer while flush bits are left behind and set at next vsync.
This is will prevent mdp iommu page fault from happening
at address 0x00000000 during resume.

Change-Id: Ide944ec1d069629f1ae2ecd0daf49c69ce2af2eb
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Do a pre-fill to writeback buffers.

When switching mdp operating mode to blt, writeback buffers need
pre-fill. Move the pre-fill code from isr routine to do_blt, where
actual switch to blt mode happens.

CRs-fixed: 471098
Change-Id: I0f845397894c749ac518a1fa605f84cd5fc2ad15
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>