Try out new hline pcore (need to resolve some more timing issues).
Add support for length 256 non-burst reads.
Added support for non-256 word aligned writes at the END of the line.
Removing no longer needed XPS project.
Clean up some code in display.c and make it a bit more efficient.
Output current z result to slave_reg3 in user_logic.
Merge branch 'hline_pcore' of https://github.com/molohov/gpu2 into hline_pcore
Update testbench for non-burst reads.
Fixed error with z end value return from hline pcore by outputting zsum rather than zout to slavereg3
Updated tb accordingly.
Fetch z_sum_out from the correct register...oops. Endpoint interpolation looks better now, but bugs still inherent.
Burst-read 4 words to fill up read fifos. Single burst reads cannot deal with 4-word aligned address requirements.
Address offset was not being calculated correctly in fsm.v for the single data beat, causing the initial z-buffer/fbuffer bugs.
Untested, but strongly suspect this will work. Will update tomorrow.
Small bug fix.
Updated timings for axi_done signals in fsm_tb to match the length 4 burst reads. (Simply divide the 5120 delay by 4 to 1280)
Fixes in fsm.v to account for non-4 word aligned reads/writes, as well as longer than 256 read/writes (bug in addr_offset calculation).
Display.c modified to do 4-word aligned beginning and end. Works in hardware :)
Reworded readcnt logic in INTERP_Z to be correct when the remaining interpolation is less than 256 and we don't want zsum to be changed as a result (because it is returned to software).
Simplified code since pcore can do word-aligned reads and writes. Bryce, test to see if this works on the board? If it does, we can easily parallelize with many hline_pcores.
Remove debug code to test hline_pcore.