Lower DDR SDRAM clock freq. because eval board doesn't support frequencies higher than 400MHz
Fix data corruption when writing to DDR SDRAM
Enhance testbench to cover QW access and reset of the TX module. Update modelsim wave set.
Update PCIe driver to support newer kernel & udev versions
Fix DDR SDRAM data corruption when dealing with burst of single accesses (e.g. memcpy() )
Fix Wishbone data corruption while reading
Fix Wishbone endpoint single word read access
Shorten registers space address bus to reflect BAR0 depth.
Update testbench to cover more transmission patterns
Remove bogus mmap page pointer check
Resize PCIe core BARs to better reflect evalboard resources & update core version
Add driver & board tests. testDMA.cpp tests real hardware, while the rest of units test driver/library functionality.
Fix DDR SDRAM data corruption
Update testbench to cover more DDR SDRAM access scenarios
Fix DMA addressing in test unit