Linux 3.0.97

Change-Id: Ic420103c153337d1887273d3ec7fcda2e28bcc3b
Linux 3.0.98

Change-Id: Iad45534027be3f8f5637f62716731268521fdcd5
Linux 3.0.99

Change-Id: Ie90b55d6928aab9a4d79ffb2bfa459d6c1052a42
ARM: implement optimized percpu variable access

From: Rob Herring <rob.herring@calxeda.com>

Use the previously unused TPIDRPRW register to store percpu offsets.
TPIDRPRW is only accessible in PL1, so it can only be used in the kernel.

This replaces 2 loads with a mrc instruction for each percpu variable
access. With hackbench, the performance improvement is 1.4% on Cortex-A9
(highbank). Taking an average of 30 runs of "hackbench -l 1000" yields:

Before: 6.2191
After: 6.1348

Will Deacon reported similar delta on v6 with 11MPCore.

The asm "memory" constraints are needed here to ensure the percpu offset
gets reloaded. Testing by Will found that this would not happen in
__schedule() which is a bit of a special case as preemption is disabled
but the execution can move cores.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Will Deacon <will.deacon@arm.com>

Conflicts:
	arch/arm/kernel/smp.c