ARM: hw_breakpoint: Clear breakpoints before enabling monitor mode

The reset value of the BCR, BVR, WCR, and WVR registers are all
UNKNOWN on ARMv7. Unfortunately, reset_ctrl_regs() clears these
registers *after* enabling monitor mode, not before, and so some
implementations may experience UNPREDICTABLE behavior if the
reset values of these registers are non-zero. Clear the
breakpoints before enabling monitor mode so that we don't
experience boot hangs/loops due to breakpoints being enabled
out of reset.

Change-Id: I029fbe40725e803183544ddd6fe40285de4137e8
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
ARM: hw_breakpoint: enable HAVE_HW_BREAKPOINT feature flag

HAVE_HW_BREAKPOINT was disabled temporarily from commit
480a82f59712136b51ee5ca05c4f22c1738010c5. Issue not seen with the
latest kernel hence re-enable the feature and fix merge issue from
previous kernel upgrade.

Change-Id: Ia6e7e8282c848dd73108e4d951b3375bb7caa63c
Signed-off-by: Jin Hong <jinh@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
prima 3.2.3.179 caf
prima: update to prima 3.2.3.182 caf