Added Placeholders For All Components

Now we know enough about how the final design will probably look, I've
added a empty fir_filter.vhd design file (just the entity and it's
ports, no processes inside).
I also had a play with the block diagram tool and replicated the
top-level design plan (coursework.bdf).
I making the block diagram I had to generate 'symbol files' for the
various components, which are the 5 added '.bsf' files.