PCIe_hdl: Move TOP files for standalone PCIe firmware.
Currently PCIe firmware TOP files (bpm_pcie_*.vhd) support both being at
the top of hierarchy for standalone builds, or inclusion in another
projects. But this design creates need for more work because we have to
support 2 options, manually editing UCF files when changing modes and
editing VHDL files.
This patch changes this by introducing top*.vhd files that will
instantiate bpm_pcie*.vhd modules. This change simplifies code and
project hierarchy.
This patch includes support for synthesis. Simulation support will
follow soon.
Changes summary:
- move bpm_pcie_*.vhd files from top/pcie/ to modules/pcie/ directory
- create new top*.vhd files in top/pcie/ directory
- delete INSTANTIATED generic as it's not needed anymore
- update UCF and XCF files
- update XISE project files
- update hdlmake Manifests
Merge branch 'master' of ohwr.org:bpm/bpm-sw
PCIe_hdl: Move PCIe files pt.2 - simulation support.
Add support for simulating standalone PCIe firmware under new project
structure. This involves mostly renaming some signal paths due to
changed hierarchy tree.
Merge branch 'master', remote-tracking branch 'lerwys/master'