EHCI: HSIC: Prevent disabling wakeup irq twice

If PM resume and Wakeup irq happen at same time
its possible to disable wakeup irq twice. Prevent
the same by protecting with spinlock

CRs-Fixed: 396895
Change-Id: I3320478d6c770787bc571964f4a38dce6927af63
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
msm: hsic: Disallow processor idle sleep while driving resume signal

HSIC controller should send SOF with in 3 msec after completing
the resume signal.  If processor is in idle sleep state, the timer
interrupt generated by HSIC controller to indicate resume completion
gets delayed.  If the interrupt handler is not run with in 3msec
after resume, the resume sequence is repeated.  Disallow processor
idle sleep to avoid multiple resume cycles.

CRs-Fixed: 397154
Change-Id: Ibc8965ad8bcd94e0b1b1d39b5b2ad8f39cf51095
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
EHCI: HSIC: Fail root hub bus suspend when port is not enabled.

HSIC controller can not detect HSIC device in low power mode.  Hence
controller suspend is allowed only when port is enabled.  But this
check is done in controller suspend routine.  Controller suspend is
attempted after root hub bus is suspended.  Even if we fail, controller
suspend, root hub bus remains in suspend state.  This would delay
the enumeration of HSIC device as root hub bus resume takes some time.

CRs-Fixed: 396444
Change-Id: I9cfdfb4beb458651fc81a3d22ad9ac79207514fd
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
EHCI: HSIC: Handle wakeup interrupt properly during probe

During HSIC probe driver registers the level triggered interrupt
on wakeup gpio. Wakeup irq line is disabled based on the return
status of interrupt registration. There is a possibility that
wakeup gpio is already pulled high after registering the interrupt
which can cause wakeup interrupts to be fired on continuously
without getting chance to disable the irq line. Hence do not
enable wake up interrupt on request irq.

CRs-Fixed: 394540
Change-Id: I3175cd8710f1d982c33a5392cc49106ee66d0aa6
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: Add support to set autosuspend delay by controller driver

USB core driver sets the autosuspend delay to 1 sec for root hub and
its children by default. In case if delay needs to be changed for a
particular controller, it requires class driver to explicitly call
PM API to set the new values. Hence add a call back handler to set
autosuspend delay in controller driver. This makes class driver code
generic.

Change-Id: I62121651f0a9648a2909ca7eb4081a6c2567ed01
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: Decrease autosuspend delay to 200ms upon usb disconnect

Reduce overall HSIC wakelock active time by decreasing autosuspend
delay for HSIC mdm device from 1 sec to 200ms. However when diag is
active it would send poll events for every 500ms causing frequent
supsend/resume. Avoid this by increasing autosuspend delay to 1 sec
when diag is active. Also, set autosuspend delay for root hub to 0 by
default. These changes reduce time HSIC controller is active when the
bus is idle for better power savings.

CRs-Fixed: 404378
Change-Id: I0500f6b125dff158e6e0c10f3f2023b18ce9dd30
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: ehci-msm-hsic: Remove usage of MSM_GPIO_TO_INT

MSM_GPIO_TO_INT is a platform-specific macro that should only
be used in board files, not drivers. In this case, we actually
don't need the GPIO number in the driver itself and only need
to manipulate it using the IRQ number it maps to, so perform the
mapping in the device file.

Change-Id: I99eb964f3c7c4e90a4d75d16b2b29c687c3437ca
Signed-off-by: Jack Pham <jackp@codeaurora.org>
EHCI: HSIC: Allow standalone power collapse when HSIC is active

HSIC generates interrupt at 4ms interval. If idle power collapse
is enabled when HSIC is active, krait keeps on going into idle
power collapse requesting RPM to handle the sleep set requirement.
If HSIC interrupt comes after 4ms interval, krait comes out of idle
power collapse and it again ask RPM to handle this request therefore
keeps RPM busy handling requests due to frequent idle power collapse.
This has a power impact. Hence only allow standalone power collapse
when HSIC is active to avoid RPM involvement in assisting kraits to
power collapse. Vote for idle power collapse when HSIC goes to low
power mode.

Change-Id: Iee8bc1fa180499f2d26fbac955a6a6ed767fdeb4
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
EHCI: HSIC: Add support to vote for SVS digital voltage

HSIC HW can operate at SVS digital voltage when it is active.
Currently HSIC is voting for 120Mhz SFAB and 64Mhz DFAB clock
frequencies. Clock frequencies are directly proportional to SVS
voltage. If DFAB is running at 64Mhz or SFAB is running at 120Mhz
or higher SVS is not possible even though HSIC votes for it. Hence
do not vote for SFAB clock frequency and only vote for 32Mhz for
DFAB in order to allow SVS to happen. Voting for SVS voltage reduces
current consumption by 3mA in HSDPA network.

Change-Id: I8a6844efbbe90a8ea118be8450f8210717c2641b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>

mako: EHCI: HSIC: Add support to vote for SVS digital voltage

HSIC HW can operate at SVS digital voltage when it is active.
Currently HSIC is voting for 120Mhz SFAB and 64Mhz DFAB clock
frequencies. Clock frequencies are directly proportional to SVS
voltage. If DFAB is running at 64Mhz or SFAB is running at 120Mhz
or higher SVS is not possible even though HSIC votes for it. Hence
do not vote for SFAB clock frequency and only vote for 32Mhz for
DFAB in order to allow SVS to happen. Voting for SVS voltage reduces
current consumption by 3mA in HSDPA network.

Change-Id: I8a6844efbbe90a8ea118be8450f8210717c2641b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: ehci-msm-hsic: Add support in device tree to MSM HSIC host

Add support in device tree to MSM HSIC host including support in
GDSC (Global Distributed Switch Controller) for new platforms.

Change-Id: I6b0df0eabb03278b97b2b69f9fcdc2ef3806ba0b
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
usb: ehci-msm-hsic: Change HSIC reset sequence

Due to USB HW changes, RST CMD resets CSC/CCS fields in PORTSC
and PCI bit in USBSTS. Therefore HSIC reset sequence should be
changed to avoid case that the device was powered up before the
host and due to a RST CMD the host will miss that the device is
connected.

CRs-Fixed: 417642
Change-Id: I2b1fb2a92658058d70ccc6cb5f73174ce4128b72
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
USB: HSIC: Add support for HSIC core and SMSC HUB using DT

Add device tree support in SMSC HUB driver which also registers
platform_device for HSIC as its child. This allows SMSC HUB driver
to turn OFF clocks for power savings after HSIC is suspended.
Also add support for SMSC HUB to use dedicated clock as ref_clk
instead of XO.

Change-Id: I3e8828ddc232936df3e21c8e1158af92b16996a2
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
usb: ehci-msm-hsic: Add asynchronous reset to HSIC

Add support for asynchronous block reset to the HSIC hardware.
In platforms that uses an asynchronous reset methodology,
the HSIC alt_core_clk is not presented.

Change-Id: I0dc0e1bf294260a5530e01660d970cc939a9dbec
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
usb: ks_bridge: Fix memory leaks in the driver

This change addresses two memory leaks:-
1) misc device is not getting deregistered during device
disconnect. Hence call misc_deregister() in disconnect.

2) Driver returns without freeing previous instances of
the driver data structure if memory allocation fails. Hence
free up memory allocated for ks_bridge structure.

Change-Id: I90133a002aa9d38597de8d1b21d3aad621552d46
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: misc: Avoid excessive logging during disconnect

When the device is in the midst of being disconnected, calls to
usb_autopm_get_interface() may fail, and a ERR-level message is
printed. Callers of such I/O functions may repeatedly try calling
again, and could end up flooding the console leading to a watchdog
timeout. Replace these printks with DBG-level messages since the
device disconnection is normal and the errors they indicate are
usually benign.

CRs-fixed: 394256
Change-Id: Icf9000faa9001832734ff9c64cd903b375cc2017
Signed-off-by: Jack Pham <jackp@codeaurora.org>
USB: HSIC: Fix setting of strobe and data gpios for HSIC host

Since the following commit I3e8828ddc232936df3e21c8e1158af92b16996a2
the ehci msm hsic host driver read device tree settings as the strobe
and the data gpios. In case that these gpios not exists in the device
tree the return value is negative. The return value was assigned to
unsigned variables, therefore the driver assumes that there are
such gpios.
This fix handles correctly the return value of the of_get_named_gpio.

Change-Id: Ia5dde57cc36438b977791df658375e0946123096
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
usb: hsic: suspend hsic until really activated by the gadget driver

Hsic can enter to low power mode only after bus suspend when
connected to host. Since there is no disconnect state in hsic,
hsic remaines resumed even not activated by the gadget driver.
Therefore hsic still votes for some resources, such as clocks,
that prevent from power save modes to occur, as Vdd minimization.

This fix suspends the hsic by default, right after hsic udc driver
Initializations take place, and only on activation by the gadget
driver,aka pullup, resume the hsic device.

Change-Id: I22ecbbd66e76e28161428287e6a8b44cf42a1325
CRs-Fixed: 400263
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
USB: ci13xxx_udc: Fix ENDPOINT PRIME failure issue

while queueing requests to USB HW, waiting till EP PRIME bit
get cleared after setting it leads to wathdog timeout. Fix
this by implementing timer based solution instead of infinite
PRIME check loop.

CRs-Fixed: 397907
Change-Id: I74e9acbfdfcd2030896d1fa813e66803ece7d5bd
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
USB: ci13xxx_udc: Add timeout of 100ms for endpoint flush loop

Currently completion of endpoint flush operation is checked after
setting that endpoint bit with ENDPTFLUSH register and polling the
same to get it clear. It has been observed that sometime this flush
operation takes huge amount of time which results into watchdog
timeout issue due to this busy loop without any time-out. Hence add
time-out of 100ms for endpoint flush operation completion and also
add 100us delay before checking ENDPTFLUSH register for endpoint bit
clear or not.

Also print important usb status register and flushed endpoint dtds
at the time of issue.

CRs-Fixed: 409382
Change-Id: I7ae57cc436077f8a03051b92750bdca9a571da2b
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
usb: gadget: ci13xxx_msm: Allow BAM enable and disable

There are scenarios where the USB BAM has to be reset.
For example, when the peer BAM is being reset, the USB BAM
must be reset as well, otherwise the BAM-BAM connection will
go out of sync.

In order to reset the USB BAM, the USB controller has to disable
the BAM first. After the USB BAM reset is completed, the USB
controller has to re-enable the USB BAM.

So this change adds the support for USB BAM enable/disable.
This is done by adding an API to ci13xxx_msm. A function driver can
ask for BAM enable/disable by calling this API.

This change doesn't add the support for the USB BAM reset sequence.

CRs-Fixed: 424867
Change-Id: Ib5518fafe3765f86bb09d1ce10723ec733543b35
Signed-off-by: Amit Blay <ablay@codeaurora.org>

Conflicts:
	include/linux/usb/msm_hsusb.h