Revert "ARM: dts: Disable VFE and Oxili power-collapse modes for 8610"

No stability issues have been attributed to Oxili or VFE power-collapse.
Re-enable this power-saving functionality.

This reverts commit 876638b78737acfe75fe833d16ba7891cd3000cd.

Conflicts:

	arch/arm/boot/dts/msm8610.dtsi

CRs-Fixed: 537500
Change-Id: Ia94822bdf13c40062c9450432d1dbebbcfb6b808
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
hwmon: qpnp-adc: Fix panic in ADC workqueue

During warm/soft reset it is seen during qpnp-adc-tm
driver interrupt registration there are pending
interrupts.

Register the ADC interrupt handler after initializing
the workqueue to handle potential cases where interrupt
is pending when an interrupt is requested and causes
panic because the workqueue is called when its not
initialized yet.

Change-Id: Iba88ab3c9f71dc94579ab85980f8cfd726f3c5c1
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
input: synaptics_fw_update: Change permissions on lockdown sysfs entry

Permissions should be set to 0664 instead of 0777 for sysfs
entries.  Change them to pass CTS test.

Change-Id: I50237eaa917303efda0ad049649611bf1b6d9c31
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
power: qpnp-charger: aicl: wait for aicl initialization

If a USB DCP peripheral is connected to the device
at bootup do not allow the maximum input current limit
to be configured for more than 500 mA.

Wait for 10 seconds to allow any userspace binary
to initialize and possibly run adaptive input current
limiting.

Change-Id: Ie37165ab162369c61357679b83340b6fae1d7f0a
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
msm: mdss: disable MDP hw underflow recovery

When MDP underflows, hardware will automatically try to issue a reset to
recover from it. Potential issue has been identified when reset happens
on two video interfaces at the same time which may lead to a hw lockup.
To avoid such situations disable the hardware underflow recovery, MDP
will still automatically recover at the beginning of next frame.

Change-Id: I3473486e229e67f6213db83a0ecb34333a977d4f
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: ADSPRPC: Allocate cached memory for ADSP RPC buffers

Pass ION_FLAG_CACHED flag to allocate cached memory for ADSP
RPC buffers that are flushed before being passed to the remote
processor.

Change-Id: I5faa2c074157efcdc3d859090c046b6a700e52a4
Acked-by: Sathish Ambley <sambley@qti.qualcomm.com>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
ASoC: msm: qdsp6v2: Add timestamp in voip frame header

Uplink timestamp needs to propagate to userspace for AV sync.
timestamp field is added in voip frame header to
capture the timestamp from LPASS for each uplink packet.

Change-Id: Id701df56e5a3d36bf83771ba9731c61a03dae3ba
Signed-off-by: Helen Zeng <xiaoyunz@codeaurora.org>
arm/dt: msm8974: Add GDSC regulator controlling Venus core

GDSC control is now moved out of PIL to enable power collapse
of Venus core through video driver.

Change-Id: Id8cf5547871434dede63c5a304311c53a9bc78dc
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
ARM: dts: msm: Add venus GDSC regulator controlling for msm8226

GDSC control is now moved out of PIL to enable power collapse
of Venus core through video driver.

Change-Id: If77e18cb903f5ff933218f42f3bb5fb238e6bfc4
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Enable venus power management

Besides clock gating, turn venus core power off
if the core stays idle for given amount of time.
Powering off venus core involves telling TZ to
suspend venus core, detach IOMMU, disable GDSC
regulator, unvote DDR/OCMEM buses.

Turn it on again when driver starts processing new
commands before enabling clocks.

Protect clock and power states and operations
with a common lock.

Change-Id: I49654069920ddaae0e2f8792b14cd1bfeb431c34
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
msm: vidc: Make HW timeout and power collapse delay configurable

Provide debugfs node for HW response timeout and a sysfs device
attribute for power collapse delay.

Change-Id: I586f10f3e90df5384c8e465fbfe8e7ebec0915eb
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
arm: dts: msm8610: fix SDC2 regulator to be turned-off

The LDO21 powering the SDC2 slot has been marked as
always-on. But this can be turned-off during
runtime/system suspend.

This patch removes the always-on attribute of this
regulator.

CRs-fixed: 511572
Change-Id: I9744a581ed2deb967da3f9cb4080de75160de236
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
USB: bam: Enable RAM12, RAM13 only for QDSS data & descriptor fifo

Currently for QDSS<->USB usecase, DWC3 core internal memory
(RAM11, RAM12, RAM13) is used for data & descriptor fifos. A data
fifo of 8KB size is enough for achieving maximum QDSS performance
instead of 16KB size. Hence enable only RAM12, RAM13 for QDSS<->USB
usecase so that remaining RAM10, RAM11 can be used for TX endpoint's
fifo allocation. This enables more fifo allocation for TX endpoints,
which will allow double buffering and results in better throughput
improvement.

CRs-Fixed: 532070
Change-Id: I7637bda9520b92537b9297f30d6003d2b6ceccf7
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
USB: dwc3: Allocate 3KB FIFO for bulk and isochronous endpoints

Currently dwc3 driver will allocate fifo size of maximum endpoint
packet size for TX endpoints depending on operating speed. Due
to this, double buffering may not work for TX endpoints in both high
speed and superspeed. Hence implement policy that allocates 3KB of
fifo for all bulk and isochronous endpoints irrespective of speed.

Policy is to allocate 3KB for bulk and isochronous endpoints and
allocate maximum packet size for control and interrupt endpoints.
This policy will improve the TX throughput numbers for function
drivers like MTP, mass storage. But side effect is we can't accomodate
more than nine bulk + isochronous endpoints in non QDSS composition
and five bulk + isochronous endpoints in QDSS composition. Otherwise
last interfaces in the USB composition will not work.

CRs-Fixed: 532070
Change-Id: I5e947f21f25fada7829c84eba45980295497cfbc
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Revert "USB: dwc3: core: Add module parameter for TX fifo resize"

commit "dbe59bf157adf17a39c041ff9379bd5ec751da5c:USB: dwc3: core:
Add module parameter for TX fifo resize" disables dynamic fifo
allocation for TX endpoints by default and provides an option to
enable it for QDSS heavy composition.

Earlier tx fifo resize logic was causing throughput discrepancy
in high speed operation due to double buffering not happening.
With the new policy to allocate 3KB for all bulk and isochronous eps
implemented, this issue will be resolved. Hence revert the change to
always enable dynamic fifo allocation for TX endpoints which will
improve throughput in superspeed mode by having larger fifo to allow
double buffering.

CRs-Fixed: 532070
Change-Id: I9984637d9d3edf8067c4604ed661d3ef8ac426c4
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
USB: f_mtp: Set maximum burst value to two for superspeed mode

Currently burst value is set to zero for superspeed in mtp driver.
MTP throughput can be improved by setting max burst vlaue to non
zero value in superspeed mode. Hence set max burst vlaue to two
for both IN and OUT bulk endpoints in superspeed mode.

CRs-Fixed: 532070
Change-Id: Ib78b8fec5d1ab934f4d4ec80b7e008149707ce0f
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
msm: mdss: Fix slower clocks during histogram and hist LUT accesses

Slower CNOC clock rates cause histogram and hist LUT access to take
longer time. Fix CNOC clock configuration at optimum rate in order
to avoid slow accesses to histogram and hist LUT.

Change-Id: I066bae9fd0b4261b71248cffea65d8949ff6aae2
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
msm: mdss: Reorder code to avoid null pointer dereference

Set mdss_res to NULL after mdss_mdp_pp_term function in err
case inside mdss_mdp_probe function. This change can avoid
null pointer dereference if err occurs during mdss_mdp_probe.

Change-Id: I90b289e03f2711d45dcb80d9fa6eeb78b447cfd4
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
msm: cpufreq: Move cpu_frequency_* trace points from acpuclock to cpufreq

acpuclock is not used on newer targets, so move the trace points
in it up to the generic msm cpufreq driver. Also drop the use of
the 'trace_cpu_frequency' entirely, since it's already present in
generic cpufreq code.

As a side effect of this change, these trace events will no longer
track cpu frequency changes from the power-collapse path. Only
frequency changes coming from cpufreq will be tracked.

CRs-Fixed: 535512
Change-Id: Ib69d92f5d3209a7e36be678997b79bcdac92f953
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: peripheral-loader: Print firmware start and end addresses

Make the starting and ending addresses of the pil images more easily
accessible to the average user. The intent is to reduce effort spent
investigating basic image overlap errors.

Change-Id: I4b1cfe1ba7b0090492443bf6fe301821329b5ae3
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>