tcg/aarch64: implement ldst 12bit scaled uimm offset

implement the 12bit scaled unsigned immediate offset
variant of LDR/STR. This improves code size by avoiding
the movi + ldst_r for naturally aligned offsets in range.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
tcg/aarch64: Implement tlb lookup fast path

Supports CONFIG_QEMU_LDST_OPTIMIZATION

Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
tcg: Remove temp_buf

All targets have been converted to allocating space for temporaries
on the stack.  No need to allocate space within the CPU_COMMON block.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Merge git://github.com/hw-claudio/qemu-aarch64-queue into tcg-next
hw/openrisc: Indent typo

Indent typo.

Signed-off-by: Jia Liu <proljc@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
hw/openrisc: Use stderr output instead of qemu_log

We should use stderr output instead of qemu_log in order to output ErrMsg
onto the screen.

Signed-off-by: Jia Liu <proljc@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
target-openrisc: Free typename in openrisc_cpu_class_by_name

We should free typename here.

Signed-off-by: Jia Liu <proljc@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Merge remote-tracking branch 'jliu/or32' into staging

# By Jia Liu
# Via Jia Liu
* jliu/or32:
  target-openrisc: Free typename in openrisc_cpu_class_by_name
  hw/openrisc: Use stderr output instead of qemu_log
  hw/openrisc: Indent typo

Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge remote-tracking branch 'rth/tcg-next' into staging

# By Claudio Fontana (1) and others
# Via Richard Henderson
* rth/tcg-next:
  tcg: Remove temp_buf
  tcg/aarch64: Implement tlb lookup fast path
  tcg/aarch64: implement ldst 12bit scaled uimm offset

Message-id: 1373919944-8521-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
linux-user: Avoid redundant ENV_GET_CPU()

This fixes a mismerge in 874ec3c5b3821bb964f9f37b2f930f2a9ce51652.

Acked-by: Riku Voipio <riku.voipio@iki.fi>
Signed-off-by: Andreas Färber <afaerber@suse.de>
kvm: Change prototype of kvm_update_guest_debug()

Passing a CPUState pointer instead of a CPUArchState pointer eliminates
the last target dependent data type in sysemu/kvm.h.

It also simplifies the code.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-s390x: Fix CPUState rework fallout

Commit f17ec444c3d39f76bcd8b71c2c05d5754bfe333e
exec: Change cpu_memory_rw_debug() argument to CPUState

missed to update s390x KVM code, breaking the build.

Let's fix it up.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-xtensa: Introduce XtensaCPU subclasses

Register a CPU type per core registered. Save the XtensaConfig in
XtensaCPUClass and copy it from there to CPUXtensaState, to avoid
touching every env->config access for now.

Prepares for storing per-class GDB register count.

Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
gdbstub: Fix cpu_gdb_{read,write}_register() Coding Style

Add braces, replace tabs, remove trailing whitespace, drop space before
parenthesis and place break etc. below case statements.

Signed-off-by: Andreas Färber <afaerber@suse.de>
gdbstub: Drop dead code in cpu_gdb_{read,write}_register()

GET_REG*() macros include a return statement, thus no need for break.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs

CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.

Allows building gdb_register_coprocessor() for xtensa, too.

As a side effect this should fix coprocessor register numbering for SMP.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Move cpu_gdb_{read,write}_register()

Signed-off-by: Andreas Färber <afaerber@suse.de>
target-ppc: Move cpu_gdb_{read,write}_register()

Signed-off-by: Andreas Färber <afaerber@suse.de>
target-sparc: Move cpu_gdb_{read,write}_register()

Signed-off-by: Andreas Färber <afaerber@suse.de>
target-arm: Move cpu_gdb_{read,write}_register()

Signed-off-by: Andreas Färber <afaerber@suse.de>