aarch64.risu: add LDNP / STNP 32bit/64bit

add ldnp and stnp.

Note that all loads and store suffer from the problem that
base register must be != target register.
This is in some cases a limitation of our framework
(in particular with stores),
in some cases it seems the Foundation models also do not
handle the case predictably (with loads).

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
aarch64.risu: ld/st: add base != target reg constraint

This constraint is sometimes a shortcoming of this framework
(notably with stores), but sometimes also an apparent issue
with Foundation models (with loads).
Since the Tech. Ref. Manual does not force (rn != rt),
this is a limitation that should be addressed at some point.

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>