stm32w: Added sample target configuration for STM32W108 with STLink-V2

As requested, here is the target configuration that I'm using for an
STLink-V2-attached STM32W108C8. For some reason, it only seems to work
with "reset_config trst_only".

Change-Id: Icbff4f83343e1f505d8afdfc53ff6f8b7496cac9
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1347
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Improve clone command in README

Without the explicit dir at the end the repository will be cloned to "code".

Change-Id: Icd8b55b4ba74f23b214c3844e2fb785377768119
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1349
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: jenkins
mips: m4k alternate pracc code. Patch 1

This patch and the following patches define another way of doing processor access without the need to read back
the pracc address as needed in current pracc code.
Current pracc code is executed linearly and unconditionally. The processor starts execution at 0xff200200
and the fetch address is ever incremented by 4, including the last instruction in the delay slot of the branch to start.
Most of the processor accesses are fetch and some are store accesses.
After a previous patch regarding the way of restoring registers (reg8 and reg9), there are no load processor accesses.
The pracc address for a store depends only on the store instruction given before.
m4k core has a 5 stage pipeline and the memory access is done in the 3rth stage. This means that the store access
will not arrive immediately after a store instruction, it appears after another instruction enters the pipeline.
For reference: MD00249 mips32 m4k manual.
A new struct pracc_queue_info is defined to help each function in generating the code. The field pracc_list holds in the
lower half the list of instructions and in the upper half the store addressess, if any. In this way the list can be used by
current code or by the new one to generate the sequence of pracc accesses.
For every pracc access only one scan to register "all" is used by calling the new function mips_ejtag_add_scan_96().
This function does not call jtag_execute_queue(), all the scans needed can be queued before calling for execution.
The pracc bit is not checked before execution, is checked after the queue has been executed.
Without calling the wait function the code works much faster, but the scan frequency must be limited. For pic32mx
with core clock at 4Mhz works  up to 600Khz and with 8Mhz up to 1200. To increase the scan frequency a delay
between scans is added by calling jtag_add_cloks().
A time delay in nano seconds is stored in scan_delay, a new field in ejtag_info, and a handler is provided for it.
A mode field is added to ejtag_info to hold the working mode. If a time delay of 2ms (2000000 ns) or higher is set,
current code is executed, if lower, new code is executed.
Initial default values are set in function mips32_init_arch_info. A reset does not change this settings.

Change-Id: I266bdb386b24744435b6e29d8489a68c0c15ff65
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1193
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
mips: m4k alternate pracc code. Patch 2

Each pracc function defines a variable ctx of type struct pracc_queue_info.
To simplify the code tree auxiliary functions are defined: pracc_queue_init(), pracc_add() and
pracc_queue_free().
The second parameter in pracc_add() is the store address if the instruction is a store at dmseg,
otherwise it should be 0.
The code is executed by mips32_pracc_queue_exec(). If ejtag_info->mode is 0 mips32_pracc_exec()
is called and it should work like with current code.
To generate the delay between scans the number of clock ticks are calculated with the help of
jtag_get_speed_khz(). Due to delays in the execution of each single ftdi instruction the number of ticks
are higher as it should be, specially at higher scan rates.
mips32_pracc_read_u32() should now work with the new code.

Change-Id: I471590a4fc89b56af10bd46c48767b4c64de154f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1194
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
mips: m4k alternate pracc code. Patch 3

Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified.
mips32_cp0_read() is very similar to mips32_read_u32() with one store access.
mips32_pracc_read_regs() is the only function that can not be executed from only one queue.
Now this function is modified to use reg8, it saves all the registers but does not restore reg8.
To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in
mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and
restore it from ejtag info instead of using DeSave for save/restore.

Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1195
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
mips: m4k alternate pracc code. Patch 4

Now all the functions with only fetch accesses are modified.
The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work
at the same scan rates as the other pracc functions, but it needs higher scan_delays
to work.

Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1196
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
stm32f30x: Add boundary scan TAP ID to match silicon

Change-Id: I74ef3cfc437540aedd99da46ac3e0c6cd9c5cd8d
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1354
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Support newer OSBDM firmware

OSBDM: add new VID:PID implemented in OSJTAG/OSBDM firmware somewhere
between versions 30.13 and 31.21.  PFLASH programming works with this
patch, tested on a Freescale Kinetis TWR-K20D72M using its onboard OSBDM
JTAG adapter.

Note: flash program testing required hacking kinetis_write() to force
longword programming, as the FTFL program section commands formulated by
kinetis_write() currently fail on this board's PK20DX256VLL7 processor.

Change-Id: Ib7b92ff2fe9ebf6158fb1489f554a19e96cd9651
Signed-off-by: R. Steve McKown <rsmckown@gmail.com>
Reviewed-on: http://openocd.zylin.com/1348
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
telnet: add telnet history support

adapted from Yoshinori Sato's patch:
https://github.com/ysat0/openocd/commit/2f07f4600a0da8206612d78c159bbe1171aa41c2

Change-Id: I084b86d316b0aa6e9593f007c024961dbda805e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1310
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Improve HACKING

Reword info about creating SSH key - it's not required to add it to
Github account. Mention adding created SSH key to Gerrit account -
without this step it's not possible to access Gerrit in further
steps.

Change-Id: Ibd81521fbe47d4b4beae0b77cdc9d939fd3ee20c
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1350
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
flash/nor: add lpc4300 variant to lpc2000 driver

This patch adds flash programming support for internal flash of the
LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768
and LPC2468). It should also work with LPC1800's with onchip flash.
The "base" parameter of the "flash bank" command is now significant
for the lpc4300 variant and required to determine the bank number
parameter needed by the IAP routines.

NOTE: I could only program flash successfully when the chip is powered
with "P2_7" pulled low to put it in ISP mode.  When running from flash
(and not the ISP ROM), the target fails to halt and the sector erase
fails. This is similar to the behavior I remember when trying out the
spifi driver on a LPC4350... lots of power cycles to make progress, one
To burn, one to run.  So I am not confident my config is set up correctly.

Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3
Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1126
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Add "lpc1800" alias for "lpc4300" flash driver

Change-Id: I6d2bb9105cc778bd1d21580022529d684c3b21b0
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1351
Tested-by: jenkins
The openocd-0.7.0-rc1 release candidate.

Change-Id: I2992c31b56b88062cdd8a8208506a61f6367fcbf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Restore -dev suffix

Change-Id: I3662c5993766a76d6dd62b919c56cc059c4e50d4
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Update NEWS

Change-Id: Icfc1245552a400232988cf44f54e5c46af1db873
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1356
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
gdb server: Fix bug. Parse 'M' packet error.

The format of 'M' packet is 'M addr,length:XX...'. The data
follows ':' immediately. No need to '+2' to SEPARATOR in
unhexify(), because SEPARATOR points to data correctly.

Change-Id: I15b5758b540816cc727752e7bf68cd45e623f603
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1360
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
build fix: ft2232

fix build with-ftd2xx-lib

Change-Id: I4a9b5d204c29b7a0714a59494b2b5f959c73f99b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1359
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
arm: fix arm reg regression

Seems commit fc2abe63fd3cea7497da7be2955d333bd3f800b9 caused a regression
in that the arm reg cmd no longer worked. The issue was caused because we
changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info.

Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1362
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
build: fix libftd2xx regression

Fix build when targeting closed src ftd2xx drivers.
configure is unable to find the dynamic linking loader lib (dl) as it
is included before ftd2xx library.

Change-Id: Ibe7308b66ed846288a31f7a27ff549b6f39baeec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1355
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
kinetis: fix "SF1" parts to limit FlexRAM usage

Ensure FlexRAM usage is limited to half the FlexRAM size when programming.
Assume the FlexNVM sector size is equal to half the FlexRAM.
Fix sector erase checking which had an error introduced when the
  kinetis_ftfx_command( ) signature was changed.

Change-Id: I88edd9c7d4a4ba474cad7b00052feaeedfa8ced8
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/1358
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>