fixed nbnxn 4x8 pair search without AVX

This bug was introduced recently.
Note that nbnxn 4x8 without AVX was only possible when manually
changing the code to use plain-C reference SIMD.

Change-Id: I5effe4076bc5ff270ebeb366f9c2b8a13c256025
introduced general 4-wide SIMD support

PME spread+gather and the nbnxn search bounding box checks use
4-wide SIMD (as opposed to arbitrary width SIMD). This SSE code
has now been replaced by macros from gmx_simd4_macros.h.
pme_sse_single.h has been renamed to pme_simd4.h
This change is mainly refactoring; it only adds PME spread+gather
AVX acceleration in double precision plus a few FMA instructions.

Change-Id: Ia5e02295bb281a2e23d57f4c165f555de6744064
use CUDA texture objects when supported

CUDA texture objects are more efficient than texture references, their
use reduces the kernel launch overhead by up to 20%. The kernel
performance is not affected.

Change-Id: Ifa7c148eb2eea8e33ed0b2f1d8ef092d59ba768e
make use of CUDA stream priorities

CUDA 5.5 introduced steam priorities with 2 levels. We make use of this
feature by launching the non-local non-bonded kernel in a high priority
stream. As a consequence, the non-local kernel will preempt the local
one and finish first. This will improve performance in multi-node runs
by reducing the possibility of late arrival of non-local forces.

Change-Id: I4efc65546e4135f12006c0422e1fca42a788129f
Fixes a problem with pair type 2 interactions with free energy

Pair type 2 interactions, which should remain on regardless
of couple-intramol=yes, were being turned off. Currently, when free
energies were turned on, they were just ignored, because the (empty)
pair one 1 type list was copied over them.  This fix adresses
this problem by adding onto the list instead of copying it over.

Fixes #1315

Change-Id: I240479a8dc083f7a355917ed9f74f4337fa3448f
fixed a half bin misalignment in gmx_vanhove -or

Change-Id: Ia800861912d50f5047742bcb1bb51e753920968f
turning off expanded ensemble for all integrators but md-vv.

Broke at some point, and somewhat tricky to turn back on
correctly for other integrators at this point; target for
5.0 when it should be more straightforward.

fixes #1321

Change-Id: I599b308800411e0cea111ffd280487037d613755
avoid division by zero in SIMD angles and dihedrals

The SIMD accelerated angle and dihedral code did not (correctly)
check for dividing by zero, which can happen with aligned bonds.
Fixes #1351

Change-Id: I326f90fca87ab5cca493204de4a58655465634ca
Restarting from checkpoint no longer reinitializes WL weights.

Fixes a problem where mdrun was reinitializing the initial Wang-Landau
delta for expanded ensemble simulations, because the flag turning it
off was stored the expanded ensemble data structure (not saved in cpt)
instead of the df_history structure (is saved in checkpoint).  In the
process, some moderate encasulaton of the df_history structure and
the expanded ensemble methods.

Fixes #1350

Change-Id: I13492a7a9773fcb417fcd0ee106d851d9838ce25
Fix SIMD C reference nbnxn kernels

Got broken by ace006a86 and 022581b388.
An additional fix for nbnxn 4x8 reference code, broken by c0cf8ce,
is in a separate patch.
Also changed the AVX256 double precision nbfp_stride from 4 to 2.

Refs #1173

Change-Id: If3b3291a7ff765acc19c29f834e856cc9798d47e
Fix typo in g_membed documentation

Suggested by Iman Pouya

Change-Id: I5c77a29b64e61f9da5a663119e149d992141eb21
Fix tMPI_Atomic_memory_barrier for MIC

MIC doesn't has sfence. It isn't required because the current generation
of MIC is in-order.

Change-Id: I6953bc3168a191a3038408e6ea35025a25509abe
Call atomics from TestAtomic.c

This exposes more compile-time errors than simply parsing
the definitions. This makes CMake's diagnostics more useful
with respect to atomic operations.

Fixes #1355

Change-Id: Ie1d6f14565700b98988cadc17cb7ac2b78d76ce3
BlueGene/Q Verlet cut-off scheme kernels

The kernels are implemented with small functions whose inlining
is guaranteed by the use of xlc and clang extensions. That's a hack
whose general solution I plan to implement in master branch.

Other BG/Q considerations:

Architecture detection now works on A2 core.

Install guide updated.

It is better to use intra-node communicators than not, and ranks
within nodes are correctly detected via querying the BlueGene/Q API,
since the hostname is not useful for the purpose.

It is better to not set GMX_DD_SENDRECV2.

It is better to use the analytical Ewald correction.

In principle, we should version the type of variables and fields named
d2, rl2, rbb2 in nbnxn_search*[ch] to be double on PowerPC and float
everywhere else (each regardless of GROMACS target precision). This
would mean that on PowerPC (where all flops take place in double
precision with free precision-extension upon load) we can be both
cache-efficient by storing bounding boxes in float, and flop-efficient
by not having to generate a round-to-single instruction to compare the
result of subc_bb_dist2_simd4 with the cut-off stored as a
float. Still, a flop per bounding-box distance comparison will not
break the bank.

Enough bgclang support exists for the build to succeed (no platform
file is required), even with OpenMP, but a number of compiler issues
have been reported on llvm-bgq-discuss mailing list.

Change-Id: I98c5791ec3766cdbdcb8a8eb7418d00585727cc0
fixed OpenMP threads being pinned to the same cores

Due to the thread id not being a thread-local variable in the OpenMP
loop setting the thread affinities, different OpenMP threads could be
pinned to the same physical cores.
Fixes #1360

Change-Id: I7bc39aef9a8854ec24006895da6005c1326033a3
fixed recent bug with CUDA texture objects

On GPUs with CUDA architecture 3.0, mdrun would exit with an error.
This bug was introduced very recently in 43b41cb8
Fixes #1361

Change-Id: I0c46867b987cbf3c0da3aa9384d985fef1e4aa73
Fix NBNxN SIMD reference kernels

nbfp_stride was added independently by both 25eb0e14 and 5deee8a0.

Removing static is not OK for gcc. Mark will resolve later whether
this was even needed for his upstream work.

Change-Id: I97ea4131163512354b5e339dd19549c3e49e9de2
improved the nbnxn buffer size estimate with GPUs

The nbnxn Verlet buffer estimate now takes into account that
constrained atoms rotate, and don't move linearly, around the atom
they are constrained to. This significantly lower the buffer size
estimate for long neighborlist life times (as used with GPUs).
The buffer for most CPU runs is not affected (significantly).
Because of the smaller buffer, mdrun now uses smaller list increase
limits for increasing nstlist when using GPUs. This improves
performance.

Also activated and tested the virtual site effective mass calculation
(vsites were ignored in the drift calculation).

Change-Id: I2cb349f483610eabcc97bfbc23d17f189dec19d6
corrected volume with serial NPT replica exchange

Replica exchange with replicas run in serial would only update
x and v, not the other state data. This gave incorrect volumes
with NPT replica exchange.
Fixes #1362

Change-Id: Ib726fbb75e800c624ef61f31e76a5d4a4e408b9c
Rename GMX_IS_* to GMX_TARGET_*

This addresses some confusion that developed between release-4-6 and
master with me trying to develop the kernels in master branch so I
could have unit testing support, and then cherry-pick them back.  I
had intended to solve #1269 in a separate commit, but it didn't happen
that way.

As #1269 discusses, the code sometimes needs to know what architecture
is being targetted by the compiler. This information is held in the
GMX_TARGET_X86 and GMX_TARGET_BGQ CMake and preprocessor
variables. Note that this information is distinct from what CPU
acceleration is being used (which might be "None" on either platform).

gmx_cpuid.c needs GMX_TARGET_X86 defined to work correctly on x86, and
is called at configure time (at which time config.h is
unavailable). So, this in CMake is treated via a command-line
definition of GMX_TARGET_X86 when required.

Fixes #1269 (even though I98c5791ec silently did this already)

Change-Id: I94e0756856e7d49ff09a87b8283189976b48ea49