i965/gs: Allocate URB space for use by GS.

Previously, we gave all of the URB space (other than the small amount
that is used for push constants) to the vertex shader.  However, when
a geometry shader is active, we need to divide it up between the
vertex and geometry shaders.

The size of the URB entries for the vertex and geometry shaders can
vary dramatically from one shader to the next.  So it doesn't make
sense to simply split the available space in two.  In particular:

- On Ivy Bridge GT1, this would not leave enough space for the worst
  case geometry shader, which requires 64k of URB space.

- Due to hardware-imposed limits on the maximum number of URB entries,
  sometimes a given shader stage will only be capable of using a small
  amount of URB space.  When this happens, it may make sense to
  allocate substantially less than half of the available space to that
  stage.

Our algorithm for dividing space between the two stages is to first
compute (a) the minimum amount of URB space that each stage needs in
order to function properly, and (b) the amount of additional URB space
that each stage "wants" (i.e. that it would be capable of making use
of).  If the total amount of space available is not enough to satisfy
needs + wants, then each stage's "wants" amount is scaled back by the
same factor in order to fit.

When only a vertex shader is active, this algorithm produces
equivalent results to the old algorithm (if the vertex shader stage
can make use of all the available URB space, we assign all the space
to it; if it can't, we let it use as much as it can).

In the future, when we need to support tessellation control and
tessellation evaluation pipeline stages, it should be straightforward
to expand this algorithm to cover them.

v2: Use "unsigned" rather than "GLuint".
i965/gs: Allocate push constant space for use by GS.

Previously, we would always use the same push constant allocation
regardless of what shader programs were being run: the available push
constant space was split into 2 equal size partitions, one for the
vertex shader, and one for the fragment shader.

Now that we are adding geometry shader support, we need to do
something smarter.  This patch adjusts things so that when a geometry
shader is in use, we split the available push constant space into 3
nearly-equal size partitions instead of 2.

Since the push constant allocation is now affected by GL state, it can
no longer be set up by brw_upload_initial_gpu_state(); instead it must
be set up by a state atom.
i965: Make sure constants re-sent after constant buffer reallocation.

The hardware requires that after constant buffers for a stage are
allocated using a 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,HS,DS,GS,PS}
command, and prior to execution of a 3DPRIMITIVE, the corresponding
stage's constant buffers must be reprogrammed using a
3DSTATE_CONSTANT_{VS,HS,DS,GS,PS} command.

Previously we didn't need to worry about this, because we only
programmed 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,HS,DS,GS,PS} once on
startup.  But now that we reallocate the constant buffers whenever
geometry shaders are switched on and off, we need to make sure the
constant buffers are reprogrammed.

We do this by adding a new bit, BRW_NEW_PUSH_CONSTANT_ALLOCATION, to
brw->state.dirty.brw.
i965/gs: Update defines related to GS surface organization.

v2 (Paul Berry <stereotype441@gmail.com): Split into its own commit.
i965: generalize brw_vs_pull_constants in preparation for GS.
i965/vs: generalize brw_vs_binding_table in preparation for GS.
i965/gs: Implement support for geometry shader surfaces.

This patch implements pull constant upload, binding table upload, and
surface setup for geometry shaders, by re-using vertex shader code
that was generalized in previous patches.

Based on work by Eric Anholt <eric@anholt.net>.
i965/gs: make the state atom for compiling Gen7 geometry shaders.

v2: Use "unsigned" rather than "GLuint".
i965/vs: generalize gen6_vs_push_constants in preparation for GS.
i965: Modify signature to update_texture_surface functions.

Previously these functions would accept a pointer to the binding table
and an index indicating which entry in the binding table should be
updated.  Now they merely take a pointer to the binding table entry to
be updated.

This will make it easier to generalize brw_texture_surfaces to support
geometry shaders.
i965/gs: generalize brw_texture_surfaces in preparation for gs.

There is a slight functionality change.  Previously we would compute a
common value for num_samplers for all stages, and populate that many
entries in each stage's surf_offset table regardless of how many
samplers each stage used.  Now we only populate the number of entries
in the surf_offset table corresponding to the number of samplers
actually used by the stage.
i965/gs: add geometry shader support to brw_texture_surfaces.
i965/gs: Implement support for geometry shader samplers.
i965/gen7: merge defines for 3DSTATE{VS,GS,WM} dword 2

Dword 2 of all 3DSTATE commands is the same, so there's no need tohave
separate defines for it.  This will allow us to unify some of the
state setup code between VS and GS.
i965/gen7: Generalize gen7_vs_state in preparation for GS.
i965/gs: Add a state atom to set up geometry shader state.
!UPSTREAM ===== END gs-phase-3 =====
glsl: During linking, record whether a GS uses EndPrimitive().

This information will be useful in the i965 back end.
i965/gs: Set control data header size/format appropriately for EndPrimitive().

The gen7 geometry shader uses a "control data header" portion of the
output URB entry to store either

(a) flag bits (1 bit/vertex) indicating whether EndPrimitive() was
    called after each vertex, or

(b) stream ID bits (2 bits/vertex) indicating which stream each vertex
    should be sent to (when multiple transform feedback streams are in
    use).

This patch modifies do_vec4_gs_prog() to determine the correct
hardware settings for configuring the control data header, and
modifies upload_gs_state() to propagate these settings to the
hardware.

In addition, it modifies do_vec4_gs_prog() to ensure that the output
URB entry is large enough to contain both the output vertices *and*
the control data header.
i965/gen7: Allow URB_WRITE channel masks to be used.

Previously, brw_urb_WRITE() would unconditionally override the channel
masks in the URB_WRITE message to 0xff (indicating that all channels
should be written to the URB).

For geometry shaders, we need the ability to set the channel masks
programatically, so create a flag to prevent brw_urb_WRITE() from
overriding them.