implement fetching of indirect zp operands.
refine REU interface to use one set of REU registers with an added
register to select which 16MB bank is being used.
clarified that processor can only execute instructions from fast RAM,
and that this includes the stack and ZP indirect operand fetches.
reindent entire buffer using emacs VHDL indenting.
begin work on Calculate state for instructions involving the ALU.
reindent to emacs VHDL indentation.
more work on ALU based instructions.
work on ALU to support BCD. Incomplete.
copy project files as well as vhdl files when building.
fix various bugs. now seems complete.
add bcdadder and alu6502 to project
work on ALU.  Change function select to a single vector signal instead
of separate lines for each function.
fix various bugs. now compiles
fix various bugs. now compiles.
add ALU as component ready for use.