Two abstract classes for LD nn,n (16 and 8 bit implementations) which
I've dubbed LoadImmToReg. The 16 and 8 bit opcodes LoadImmToReg_. Added
a test for LoadImmToReg opcodes. Currently the test includes tests for
a 8 and 16 bit version of this opcode.
Merge branch 'kevins_branch' of https://github.com/rokthewok/EmuNotOstrich into johns_branch
Fixed flag setting logic
Created addition opcode classes. Heirarchy modeled after increment and decrement
Added addition tests to suite
Added remaining 8 bit addition codes. Also refactored base class flag checks
Completed all but one Addition test case
provided initialization code for memory data member
Completed 8 bit addition tests
Added tests for number of cycles in AdditionTests
Add getCycle test to Decrement Opcodes test
Merge remote-tracking branch 'origin/master' into kevins_branch
Merge branch 'master' into johns_branch

updating my branch
Merge branch 'kevins_branch'