HACK: force enable uart3 rx iochain wakeup

Allows us to wakeup from suspend with DT boot.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
HACK: Makefile: Build a uImage with dtb already appended

Do not commit to mainline; this is a useful hack only for now.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ARM: dts: OMAP5: Add mailbox dt node

https://patchwork.kernel.org/patch/2839666/

Add the mailbox device DT node for OMAP5 SoC.

Signed-off-by: Suman Anna <s-anna@ti.com>
clk: add support for registering clocks from description

clk_register_desc is the primary interface for populating the clock tree
with new clock nodes. In time, this will replace the various hardware-specific
registration functions (e.g. clk_register_gate).

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: fixed-rate: add support for registering fixed-rate clock from descriptor

New clk_register_desc() call can be used to register this clock type now.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: divider: add support for registering divider clock from descriptor

New clk_register_desc() call can be used to register this clock type now.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: mux: add support for registering mux clock from descriptor

New clk_register_desc() call can be used to register this clock type now.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: gate: add support for registering gate clock from descriptor

New clk_register_desc() call can be used to register this clock type now.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: add support for low level register ops

Low level register ops are needed for providing SoC or IP block specific
access routines to clock registers. Subsequent patches add support for
the low level ops for the individual clock drivers.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: divider: add support for low level ops

Divider clock can now be registered to use low level register access ops.
Preferred initialization method is via clock description.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: gate: add support for low level ops

Gate clock can now be registered to use low level register access ops.
Preferred initialization method is via clock description.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: mux: add support for low level ops

Multiplexer clock can now be registered to use low level register access ops.
Preferred initialization method is via clock description.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: TI: add DT alias clock registration mechanism

Some devices require their clocks to be available with a specific
dev-id con-id mapping. With DT, the clocks can be found by default
only with their name, or alternatively through the device node of
the consumer. With drivers, that don't support DT fully yet, add
mechanism to register specific clock names.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: ti: add init support for clock IP blocks

ti_dt_clk_init_provider() can now be used to initialize the contents of
a single clock IP block. This parses all the clocks under the IP block
and calls the corresponding init function for them.

This patch also introduces a helper function for the TI clock drivers
to get register info from DT and append the master IP info to this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: TI: Add DPLL clock support

The OMAP clock driver now supports DPLL clock type. This patch also
adds support for DT DPLL nodes.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: TI: add autoidle support

TI clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node properties and adds autoidle support
if required, and just passes the registration forward to basic clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: ti: add composite clock support

This is a multipurpose clock node, which contains support for multiple
sub-clocks. Uses basic composite clock type to implement the actual
functionality, and TI specific gate, mux and divider clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: ti: add support for ti divider-clock

This patch adds support for TI divider clock binding, which simply uses
the basic clock divider to provide the features needed.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
clk: ti: add support for TI fixed factor clock

This behaves exactly in similar manner to basic fixed-factor-clock, but
adds a few properties on top for handling clock hardware autoidling.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
CLK: TI: add support for gate clock

This patch adds support for TI specific gate clocks. These behave as basic
gate-clock, but have different ops / hw-ops for controlling the actual
gate, for example waiting until the clock is ready. Several sub-types
are supported:
- ti,gate-clock: basic gate clock with default ops/hwops
- ti,clkdm-gate-clock: clockdomain level gate control
- ti,dss-gate-clock: gate clock with DSS specific hardware handling
- ti,am35xx-gate-clock: gate clock with AM35xx specific hardware handling
- ti,hsdiv-gate-clock: gate clock with OMAP36xx hardware errata handling

Signed-off-by: Tero Kristo <t-kristo@ti.com>